1/*
2 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* /dts-v1/; */
8
9#include <arm/armv8.1-m.dtsi>
10#include <zephyr/dt-bindings/i2c/i2c.h>
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
13#include <mem.h>
14
15/ {
16	aliases {
17		led0 = &led_0;
18		led1 = &led_1;
19		sw0 = &user_button_0;
20		sw1 = &user_button_1;
21	};
22
23	leds {
24		compatible = "gpio-leds";
25		led_0: led_0 {
26			gpios = <&gpio_led0 0>;
27			label = "USERLED0";
28		};
29		led_1: led_1 {
30			gpios = <&gpio_led0 1>;
31			label = "USERLED1";
32		};
33		led_2: led_2 {
34			gpios = <&gpio_led0 2>;
35			label = "USERLED2";
36		};
37		led_3: led_3 {
38			gpios = <&gpio_led0 3>;
39			label = "USERLED3";
40		};
41		led_4: led_4 {
42			gpios = <&gpio_led0 4>;
43			label = "USERLED4";
44		};
45		led_5: led_5 {
46			gpios = <&gpio_led0 5>;
47			label = "USERLED5";
48		};
49		led_6: led_6 {
50			gpios = <&gpio_led0 6>;
51			label = "USERLED6";
52		};
53		led_7: led_7 {
54			gpios = <&gpio_led0 7>;
55			label = "USERLED7";
56		};
57		led_8: led_8 {
58			gpios = <&gpio_led0 8>;
59			label = "PB1LED";
60		};
61		led_9: led_9 {
62			gpios = <&gpio_led0 9>;
63			label = "PB2LED";
64		};
65	};
66
67	gpio_keys {
68		compatible = "gpio-keys";
69		user_button_0: button_0 {
70			label = "USERPB0";
71			gpios = <&gpio_button 0>;
72			zephyr,code = <INPUT_KEY_0>;
73		};
74		user_button_1: button_1 {
75			label = "USERPB1";
76			gpios = <&gpio_button 1>;
77			zephyr,code = <INPUT_KEY_1>;
78		};
79	};
80
81	null_ptr_detect: null_ptr_detect@0 {
82		compatible = "zephyr,memory-region";
83		/* 0 - CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE> */
84		reg = <0x0 0x400>;
85		zephyr,memory-region = "NULL_PTR_DETECT";
86		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_FLASH) )>;
87	};
88	/* DDR4 - 2G, alternates non-secure/secure every 256M */
89	ddr4: memory@60000000 {
90		device_type = "memory";
91		compatible = "zephyr,memory-region";
92		reg = <0x60000000 DT_SIZE_M(256)
93		       0x70000000 DT_SIZE_M(256)
94		       0x80000000 DT_SIZE_M(256)
95		       0x90000000 DT_SIZE_M(256)
96		       0xa0000000 DT_SIZE_M(256)
97		       0xb0000000 DT_SIZE_M(256)
98		       0xc0000000 DT_SIZE_M(256)
99		       0xd0000000 DT_SIZE_M(256)>;
100		zephyr,memory-region = "DDR4";
101	};
102};
103
104&nvic {
105	arm,num-irq-priority-bits = <3>;
106};
107