1/*
2 * Copyright (c) 2019, Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <synopsys/arc_hsdk.dtsi>
10
11/ {
12
13	aliases {
14		uart-0 = &uart0;
15		led0 = &led0;
16		led1 = &led1;
17		led2 = &led2;
18		led3 = &led3;
19	};
20
21	leds {
22		compatible = "gpio-leds";
23		led0: led_0 {
24			gpios = <&cy8c95xx_port1 4 GPIO_ACTIVE_HIGH>;
25			label = "LED 0";
26		};
27		led1: led_1 {
28			gpios = <&cy8c95xx_port1 5 GPIO_ACTIVE_HIGH>;
29			label = "LED 1";
30		};
31		led2: led_2 {
32			gpios = <&cy8c95xx_port1 6 GPIO_ACTIVE_HIGH>;
33			label = "LED 2";
34		};
35		led3: led_3 {
36			gpios = <&cy8c95xx_port1 7 GPIO_ACTIVE_HIGH>;
37			label = "LED 3";
38		};
39	};
40
41	chosen {
42		zephyr,sram = &ddr0;
43		zephyr,console = &uart0;
44		zephyr,shell-uart = &uart0;
45	};
46
47	arduino_header: connector {
48		compatible = "arduino-header-r3";
49		#gpio-cells = <2>;
50		gpio-map-mask = <0xffffffff 0xffffffc0>;
51		gpio-map-pass-thru = <0 0x3f>;
52		gpio-map = <0 0 &cy8c95xx_port0 2 0>,	/* A0 */
53			   <1 0 &cy8c95xx_port0 3 0>,	/* A1 */
54			   <2 0 &cy8c95xx_port0 4 0>,	/* A2 */
55			   <3 0 &cy8c95xx_port0 5 0>,	/* A3 */
56			   <4 0 &gpio0 18 0>,	/* A4 */
57			   <5 0 &gpio0 19 0>,	/* A5 */
58			   <6 0 &gpio0 23 0>,	/* D0 */
59			   <7 0 &gpio0 22 0>,	/* D1 */
60			   <8 0 &gpio0 16 0>,	/* D2 */
61			   <9 0 &gpio0 17 0>,	/* D3 */
62			   <10 0 &gpio0 11 0>,	/* D4 */
63			   <11 0 &gpio0 9 0>,	/* D5 */
64			   <12 0 &gpio0 21 0>,	/* D6 */
65			   <13 0 &gpio0 20 0>,	/* D7 */
66			   <14 0 &gpio0 10 0>,	/* D8 */
67			   <15 0 &gpio0 8 0>,	/* D9 */
68			   <16 0 &gpio0 12 0>,	/* D10 */
69			   <17 0 &gpio0 13 0>,	/* D11 */
70			   <18 0 &gpio0 14 0>,	/* D12 */
71			   <19 0 &gpio0 15 0>,	/* D13 */
72			   <20 0 &gpio0 18 0>,	/* D14 */
73			   <21 0 &gpio0 19 0>;	/* D15 */
74	};
75};
76
77arduino_spi: &spi2 {};
78
79&uart0 {
80	status = "okay";
81	current-speed = <115200>;
82};
83
84&gpio0 {
85	status = "okay";
86	interrupts = <56 1>;
87};
88
89&creg_gpio {
90	status = "okay";
91};
92
93&spi0 {
94	status = "okay";
95	clock-frequency = <33333333>;
96	cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_HIGH>,
97			   <&creg_gpio 1 GPIO_ACTIVE_HIGH>,
98			   <&creg_gpio 2 GPIO_ACTIVE_HIGH>,
99			   <&creg_gpio 3 GPIO_ACTIVE_HIGH>;
100};
101
102&spi1 {
103	status = "okay";
104	clock-frequency = <33333333>;
105	cs-gpios = <&creg_gpio 4 GPIO_ACTIVE_HIGH>,
106			   <&creg_gpio 5 GPIO_ACTIVE_HIGH>,
107			   <&creg_gpio 6 GPIO_ACTIVE_HIGH>;
108};
109
110&spi2 {
111	status = "okay";
112	clock-frequency = <33333333>;
113	cs-gpios = <&creg_gpio 8 GPIO_ACTIVE_HIGH>,
114			   <&creg_gpio 9 GPIO_ACTIVE_HIGH>,
115			   <&creg_gpio 10 GPIO_ACTIVE_HIGH>;
116};
117
118&i2c0 {
119	status = "okay";
120	clock-frequency = <I2C_BITRATE_STANDARD>;
121
122	cy8c95xx: cy8c95xx@20 {
123		compatible = "cypress,cy8c95xx-gpio";
124		reg = <0x20>;
125		ranges;
126		#address-cells = <1>;
127		#size-cells = <0>;
128
129		cy8c95xx_port0: cy8c95xx_port@0 {
130			compatible = "cypress,cy8c95xx-gpio-port";
131			reg = <0x00>;
132			gpio-controller;
133			#gpio-cells = <2>;
134			ngpios = <8>;
135			status = "okay";
136		};
137
138		cy8c95xx_port1: cy8c95xx_port@1 {
139			compatible = "cypress,cy8c95xx-gpio-port";
140			reg = <0x01>;
141			gpio-controller;
142			#gpio-cells = <2>;
143			ngpios = <8>;
144			status = "okay";
145		};
146	};
147};
148