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Searched defs:cpuss_interrupts_dmac_0_IRQn (Results 1 – 25 of 265) sorted by relevance

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/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy8c6144fmi_s4f73.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144fmi_s4f93.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144fmq_s4f93.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144lqi_s4f12.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144lqi_s4f62.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144lqi_s4f82.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144lqi_s4f92.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144lqq_s4f92.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145azi_s3f02.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145azi_s3f12.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145azi_s3f62.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145azi_s3f72.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145fni_s3f11.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145fni_s3f71.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145lqi_s3f12.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145lqi_s3f42.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6145lqi_s3f72.h100 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144azi_s4f12.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144azi_s4f83.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144azi_s4f92.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144azq_s4f93.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144fmi_s4f03.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6144fmi_s4f53.h104 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6245fni_s3d11.h280 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator
Dcy8c6245fni_s3d41.h280 cpuss_interrupts_dmac_0_IRQn = 52, /*!< 52 [Active] CPUSS DMAC, Channel #0 */ enumerator

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