1/*
2 * Copyright (c) 2021 Laird Connectivity
3 * Copyright (c) 2024 Ezurio
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9#include <nordic/nrf51822_qfac.dtsi>
10#include "rm1xx_dvk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "Ezurio RM1XX_DVK";
15	compatible = "ezurio,rm1xx_dvk";
16
17	chosen {
18		zephyr,console = &uart0;
19		zephyr,shell-uart = &uart0;
20		zephyr,bt-mon-uart = &uart0;
21		zephyr,bt-c2h-uart = &uart0;
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,code-partition = &slot0_partition;
25	};
26
27	buttons {
28		compatible = "gpio-keys";
29		button2: button_2 {
30			gpios = <&gpio0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
31			label = "Push button switch 2 (BUTTON2)";
32			zephyr,code = <INPUT_KEY_0>;
33		};
34	};
35
36	/* These aliases are provided for compatibility with samples */
37	aliases {
38		sw0 = &button2;
39		lora0 = &lora0;
40		watchdog0 = &wdt0;
41	};
42};
43
44&gpiote {
45	status = "okay";
46};
47
48&gpio0 {
49	status = "okay";
50};
51
52&i2c0 {
53	compatible = "nordic,nrf-twi";
54	status = "okay";
55	pinctrl-0 = <&i2c0_default>;
56	pinctrl-1 = <&i2c0_sleep>;
57	pinctrl-names = "default", "sleep";
58};
59
60/* SPI0 cannot be used with I2C0 */
61&spi0 {
62	/* Disabled by default */
63	compatible = "nordic,nrf-spi";
64	cs-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
65	pinctrl-0 = <&spi0_default>;
66	pinctrl-1 = <&spi0_sleep>;
67	pinctrl-names = "default", "sleep";
68};
69
70&spi1 {
71	compatible = "nordic,nrf-spi";
72	status = "okay";
73	cs-gpios = <&gpio0 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>,
74		   <&gpio0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
75
76	pinctrl-0 = <&spi1_default>;
77	pinctrl-1 = <&spi1_sleep>;
78	pinctrl-names = "default", "sleep";
79	at25: at25df041b@0 {
80		compatible = "jedec,spi-nor";
81		reg = <0>;
82		spi-max-frequency = <1000000>;
83		jedec-id = [1f 44 02];
84		size = <0x400000>;
85		has-lock = <0xbc>;
86		has-dpd;
87		t-enter-dpd = <500>;
88		t-exit-dpd = <20>;
89	};
90
91	lora0: lora@1 {
92		compatible = "semtech,sx1272";
93		reg = <1>;
94		reset-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
95		dio-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>,
96			    <&gpio0 13 GPIO_ACTIVE_HIGH>,
97			    <&gpio0 14 GPIO_ACTIVE_HIGH>,
98			    <&gpio0 15 GPIO_ACTIVE_HIGH>,
99			    <&gpio0 16 GPIO_ACTIVE_HIGH>,
100			    <&gpio0 1 GPIO_ACTIVE_HIGH>;
101		rfi-enable-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
102		rfo-enable-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
103		spi-max-frequency = <1000000>;
104	};
105};
106
107&uart0 {
108	compatible = "nordic,nrf-uart";
109	current-speed = <115200>;
110	status = "okay";
111	pinctrl-0 = <&uart0_default>;
112	pinctrl-1 = <&uart0_sleep>;
113	pinctrl-names = "default", "sleep";
114};
115
116&flash0 {
117	partitions {
118		compatible = "fixed-partitions";
119		#address-cells = <1>;
120		#size-cells = <1>;
121
122		/* 52K */
123		boot_partition: partition@0 {
124			label = "mcuboot";
125			reg = <0x00000000 0x0000C000>;
126		};
127		/* 188K */
128		slot0_partition: partition@c000 {
129			label = "image-0";
130			reg = <0x0000C000 0x00030000>;
131		};
132
133		/*
134		 * Storage partition will be used by FCB/LittleFS/NVS
135		 * if enabled. 16KB
136		 */
137		storage_partition: partition@3c000 {
138			label = "storage";
139			reg = <0x0003C000 0x00004000>;
140		};
141	};
142};
143
144&at25 {
145	partitions {
146		compatible = "fixed-partitions";
147		#address-cells = <1>;
148		#size-cells = <1>;
149
150		/* 188K reserved for slot1 */
151
152		/* 68K */
153		lfs_partition: partition@30000 {
154			label = "lfs_storage";
155			reg = <0x00030000 0x00010000>;
156		};
157	};
158};
159