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Searched defs:XTENSA_IRQ_NUM_MASK (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/soc/nxp/imx/imx8ulp/adsp/include/
Dsoc.h19 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/nxp/imx/imx8x/adsp/include/
Dsoc.h19 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/nxp/imx/imx8/adsp/include/
Dsoc.h19 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/nxp/imx/imx8m/adsp/include/
Dsoc.h19 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/include/
Dsoc.h19 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/
Dadsp_interrupt.h13 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace15_mtpm/
Dadsp_interrupt.h77 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace20_lnl/
Dadsp_interrupt.h75 #define XTENSA_IRQ_NUM_MASK 0xff macro
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace30/
Dadsp_interrupt.h75 #define XTENSA_IRQ_NUM_MASK 0xff macro