| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K148_QUADSPI.h | 98 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_QUADSPI.h | 104 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_QUADSPI.h | 114 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| D | S32Z2_NETC_F3_SI5.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI6.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI7.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI4.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI1.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI2.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI3.h | 212 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| D | S32Z2_NETC_F3_SI0.h | 214 …__IO uint32_t TBSR; /**< Tx BDR 0 status register..Tx BDR 17 status r… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 18276 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 19249 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 17780 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 17778 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 27225 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 27226 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core1.h | 66784 __I uint32_t TBSR; /**< TX Buffer Status, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_hifi1.h | 63492 __I uint32_t TBSR; /**< TX Buffer Status, offset: 0x150 */ member
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| D | MIMXRT735S_cm33_core1.h | 63561 __I uint32_t TBSR; /**< TX Buffer Status, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 46181 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 46181 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/ |
| D | MIMXRT798S_hifi1.h | 66713 __I uint32_t TBSR; /**< TX Buffer Status, offset: 0x150 */ member
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| D | MIMXRT798S_cm33_core1.h | 66784 __I uint32_t TBSR; /**< TX Buffer Status, offset: 0x150 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 44008 __I uint32_t TBSR; /**< TX Buffer Status Register, offset: 0x150 */ member
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