Searched defs:STAT_CLR (Results 1 – 11 of 11) sorted by relevance
| /hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 11714 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
36838 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 13052 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
39303 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 13000 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
39229 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 6648 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 7388 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 10042 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 10024 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 9595 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 10784 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm7.h | 80337 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
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| D | MIMXRT1176_cm4.h | 81268 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
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