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Searched defs:RegValue (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/
DQspi_Ip_HwAccess.h94 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_GetClrTxStatus() local
116 uint32 RegValue = (uint32)BaseAddr->SPTRCLR; in Qspi_Ip_GetClrAhbStatus() local
265 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_SetIdleLineValuesB() local
282 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_SetIdleLineValuesA() local
314 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveEnA() local
329 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveUpdateA() local
345 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLEnableA() local
370 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveBypassA() local
386 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveAutoUpdateA() local
410 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLFreqEnA() local
[all …]
/hal_nxp-latest/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h91 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_GetClrTxStatus() local
113 uint32 RegValue = (uint32)BaseAddr->SPTRCLR; in Qspi_Ip_GetClrAhbStatus() local
247 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_SetIdleLineValuesA() local
278 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveEnA() local
292 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveUpdateA() local
307 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLEnableA() local
322 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveBypassA() local
338 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveAutoUpdateA() local
353 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLFreqEnA() local
367 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSetCoarseDelayA() local
[all …]
/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Selector.c507 uint32 RegValue; in Clock_Ip_ResetScgRunSel_TrustedCall() local
520 uint32 RegValue; in Clock_Ip_SetScgRunSel_TrustedCall() local
534 uint32 RegValue; in Clock_Ip_SetScgVlprSel_TrustedCall() local
548 uint32 RegValue; in Clock_Ip_ResetScgHsrunSel_TrustedCall() local
560 uint32 RegValue; in Clock_Ip_SetScgHsrunSel_TrustedCall() local
573 uint32 RegValue; in Clock_Ip_ResetSimRtcSel_TrustedCall() local
586 uint32 RegValue; in Clock_Ip_SetSimRtcSel_TrustedCall() local
599 uint32 RegValue; in Clock_Ip_ResetSimLpoSel_TrustedCall() local
611 uint32 RegValue; in Clock_Ip_SetSimLpoSel_TrustedCall() local
627 uint32 RegValue; in Clock_Ip_ResetScgClkoutSel_TrustedCall() local
[all …]
DClock_Ip_Divider.c465 uint32 RegValue; in Clock_Ip_SetScgAsyncDiv1_TrustedCall() local
480 uint32 RegValue; in Clock_Ip_SetScgAsyncDiv2_TrustedCall() local
495 uint32 RegValue; in Clock_Ip_SetScgRunDivcore_TrustedCall() local
508 uint32 RegValue; in Clock_Ip_SetScgRunDivbus_TrustedCall() local
521 uint32 RegValue; in Clock_Ip_SetScgRunDivslow_TrustedCall() local
534 uint32 RegValue; in Clock_Ip_SetScgVlprDivcore_TrustedCall() local
547 uint32 RegValue; in Clock_Ip_SetScgVlprDivbus_TrustedCall() local
560 uint32 RegValue; in Clock_Ip_SetScgVlprDivslow_TrustedCall() local
573 uint32 RegValue; in Clock_Ip_SetScgHsrunDivcore_TrustedCall() local
586 uint32 RegValue; in Clock_Ip_SetScgHsrunDivbus_TrustedCall() local
[all …]
DClock_Ip_Gate.c389 uint32 RegValue; in Clock_Ip_ClockSetSimLPO1KEnable_TrustedCall() local
402 uint32 RegValue; in Clock_Ip_ClockSetSimLPO32KEnable_TrustedCall() local
415 uint32 RegValue; in Clock_Ip_ClockSetSimClkoutEnable_TrustedCall() local
428 uint32 RegValue; in Clock_Ip_ClockSetPccCgcEnable_TrustedCall() local
445 uint32 RegValue = (uint32 )IP_SIM->PLATCGC; in Clock_Ip_ClockSetSimGate_TrustedCall() local
456 uint32 RegValue; in Clock_Ip_ClockSetSimTraceEnable_TrustedCall() local
DClock_Ip_IntOsc.c182 uint32 RegValue; in Clock_Ip_SetFircDivSelHSEb() local
380 uint32 RegValue; in SetInputSouceSytemClock() local
DClock_Ip_Specific.c415 uint32 RegValue; in Clock_Ip_EnableCmu0Gate_TrustedCall() local
428 uint32 RegValue; in Clock_Ip_EnableCmu1Gate_TrustedCall() local
/hal_nxp-latest/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Selector.c182 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswSwip() local
314 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip() local
421 uint32 RegValue; in Clock_Ip_ResetCgmXCscCssCsGrip() local
486 uint32 RegValue; in Clock_Ip_SetCgmXCscCssCsGrip() local
579 uint32 RegValue; in Clock_Ip_SetRtcRtccClksel_TrustedCall() local
DClock_Ip_Divider.c145 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
234 uint32 RegValue; in Clock_Ip_SetPllPll0divDeDivOutput() local
266 uint32 RegValue; in Clock_Ip_SetPllPlldvOdiv2Output() local
DClock_Ip_IntOsc.c208 uint32 RegValue; in Clock_Ip_SetFircDivSelHSEb() local
DClock_Ip_Specific.c375 uint32 RegValue; in Clock_Ip_CodeInRamSetFlashWaitStates() local
/hal_nxp-latest/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Divider.c148 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
237 uint32 RegValue; in Clock_Ip_SetCgmXDeDivFmtStatWithoutPhase() local
314 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhaseWithTrigger() local
389 uint32 RegValue; in Clock_Ip_SetPlldigPll0divDeDivOutput() local
DClock_Ip_Selector.c184 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswSwip() local
288 uint32 RegValue; in Clock_Ip_ResetCgmXCscCssCsGrip() local
354 uint32 RegValue; in Clock_Ip_SetCgmXCscCssCsGrip() local
442 uint32 RegValue; in Clock_Ip_SetGprXClkoutSelMuxsel() local
DClock_Ip_Pll.c444 uint32 RegValue; in Clock_Ip_ResetLfastPLL() local
508 uint32 RegValue; in Clock_Ip_SetLfastPLL() local
DClock_Ip_Specific.c188 uint32 RegValue; in Clock_Ip_SpecificPlatformInitClock() local
/hal_nxp-latest/s32/drivers/s32k3/Mcl/src/
DLcu_Ip.c360 uint32 RegValue; in Lcu_Ip_SetSyncInputSwOverrideEnable() local
452 uint32 RegValue; in Lcu_Ip_SetSyncInputSwOverrideValue() local
662 uint32 RegValue; in Lcu_Ip_SetSyncOutputDebugMode() local
753 uint32 RegValue; in Lcu_Ip_SetSyncOutputEnable() local
DTrgmux_Ip_HwAcc.c113 uint32 RegValue; in hwAcc_Init() local
141 uint32 RegValue; in hwAcc_SetInputForOutput() local
/hal_nxp-latest/s32/drivers/s32ze/Eth_NETC/src/
DNetc_Eth_Ip.c1298 static inline void Netc_Eth_Ip_ConfigPortTimeGateScheduling_GateControlState(uint32* const RegValue… in Netc_Eth_Ip_ConfigPortTimeGateScheduling_GateControlState()
2809 uint32 RegValue; in Netc_Eth_Ip_ConfigPortTimeGateScheduling() local
/hal_nxp-latest/s32/drivers/s32ze/EthSwt_NETC/src/
DNetc_EthSwt_Ip.c4210 uint32 RegValue; local