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Searched defs:RAMCTRL (Results 1 – 25 of 65) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_msc.h83 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_msc.h83 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_msc.h83 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_msc.h83 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg11b110f2048im64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg11b110f2048iq64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg11b120f2048gm64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg11b120f2048gq64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg11b110f2048gq64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_msc.h83 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b110f1024gm64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b110f1024gq64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b110f1024im64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b110f1024iq64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b130f512gm64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b130f512gq64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b130f512im64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b130f512iq64.h419 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512il120.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512im64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512iq100.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512iq64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512gq100.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512gq64.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member
Defm32gg12b530f512il112.h424 __IOM uint32_t RAMCTRL; /**< RAM Control Enable Register */ member

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