/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 18949 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 33381 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 18931 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 33363 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 17427 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 30610 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 20599 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 38744 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 18624 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 32850 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 21945 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 41209 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 21893 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 41135 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 7234 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
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D | MIMXRT685S_cm33.h | 11975 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 11239 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/ |
D | MIMXRT1015.h | 13589 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
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/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/ |
D | MIMXRT1176_cm7.h | 50267 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 82904 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
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D | MIMXRT1176_cm4.h | 50264 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member 83835 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
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/hal_nxp-2.7.6/mcux/devices/MIMX8MM6/ |
D | MIMX8MM6_cm4.h | 19075 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
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