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Searched defs:DMA_CSR_DREQ_MASK (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h2409 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h2409 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h3217 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h4711 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h4715 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h3908 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h2067 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h9433 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h1996 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h2067 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h9421 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h8496 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h9425 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h8490 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h9310 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h10063 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h12072 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h15400 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h15382 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h14251 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h17085 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h15440 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h18423 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h18371 #define DMA_CSR_DREQ_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h32274 #define DMA_CSR_DREQ_MASK (0x8U) macro

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