Home
last modified time | relevance | path

Searched defs:CTRL0_CLR (Results 1 – 25 of 41) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h1602 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31687 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h1600 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31685 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h1600 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31685 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h1602 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31687 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h1602 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31687 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h1600 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31685 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
DMIMX8MN6_ca53.h1629 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
31713 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h1198 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
29241 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h1198 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
29241 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h1198 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
29241 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h1198 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
29241 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h1198 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
29241 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h794 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status … member
20025 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, o… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
DMIMX8MM6_ca53.h1662 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33860 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h1632 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
33837 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h1791 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
52527 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h1791 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
52527 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h1791 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
52527 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h1774 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
50414 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member
DMIMX8ML8_cm7.h1791 …__IO uint32_t CTRL0_CLR; /**< AHB to APBH Bridge Control and Status Regist… member
52527 …__IO uint32_t CTRL0_CLR; /**< GPMI Control Register 0 Description, offset:… member

12