/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/ |
D | bsp_clock_cfg.h | 33 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 2) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2a1/ |
D | bsp_clock_cfg.h | 33 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 2) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4w1/ |
D | bsp_clock_cfg.h | 44 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 2) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m1/ |
D | bsp_clock_cfg.h | 44 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 2) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m1/ |
D | bsp_clock_cfg.h | 42 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m2/ |
D | bsp_clock_cfg.h | 42 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m3/ |
D | bsp_clock_cfg.h | 42 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m2/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m3/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e1/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e1/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e2/ |
D | bsp_clock_cfg.h | 41 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e2/ |
D | bsp_clock_cfg.h | 42 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m4/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4l1/ |
D | bsp_clock_cfg.h | 50 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 2) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m5/ |
D | bsp_clock_cfg.h | 52 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 4) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8t1/ |
D | bsp_clock_cfg.h | 72 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 8) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8d1/ |
D | bsp_clock_cfg.h | 73 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 8) macro
|
/hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8m1/ |
D | bsp_clock_cfg.h | 73 #define BSP_CFG_PCLKB_DIV RA_CGC_CLK_DIV(DT_NODELABEL(pclkb), div, 8) macro
|