Searched refs:uart_clk (Results 1 – 8 of 8) sorted by relevance
| /trusted-firmware-m-latest/platform/ext/target/arm/rse/kronos/device/ |
| D | host_device_definition.c | 40 .uart_clk = 0,
54 .uart_clk = 0,
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/tc/device/ |
| D | host_device_definition.c | 40 .uart_clk = 0,
54 .uart_clk = 0,
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| /trusted-firmware-m-latest/platform/ext/target/arm/musca_b1/Device/Source/ |
| D | device_definition.c | 316 .uart_clk = 0,
330 .uart_clk = 0,
345 .uart_clk = 0,
359 .uart_clk = 0,
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| /trusted-firmware-m-latest/platform/ext/target/arm/drivers/usart/pl011/ |
| D | uart_pl011_drv.c | 361 uint32_t uart_clk) in uart_pl011_init() argument
370 if(uart_clk == 0) { in uart_pl011_init()
379 dev->data->uart_clk = uart_clk; in uart_pl011_init()
382 err = _uart_pl011_set_baudrate(p_uart, uart_clk, def_baud); in uart_pl011_init()
445 err = _uart_pl011_set_baudrate(p_uart, dev->data->uart_clk, baudrate); in uart_pl011_set_baudrate()
1006 irlp_baud16_clk = dev->data->uart_clk/value; in uart_pl011_set_sirlp_divisor()
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| D | uart_pl011_drv.h | 275 uint32_t uart_clk; /*!< UART clock */ member
303 uint32_t uart_clk);
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| /trusted-firmware-m-latest/platform/ext/target/arm/musca_s1/Device/Source/ |
| D | device_definition.c | 414 .uart_clk = 0,
429 .uart_clk = 0,
444 .uart_clk = 0,
459 .uart_clk = 0,
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/rdfremont/device/ |
| D | rse_expansion_device_definition.c | 37 .uart_clk = 0,
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| /trusted-firmware-m-latest/platform/ext/target/arm/corstone1000/Device/Source/ |
| D | device_definition.c | 29 .uart_clk = 0,
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