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/trusted-firmware-m-latest/docs/security/security_advisories/
Dstack_seal_vulnerability.rst31 address and RET_PSR from the respective secure stack. The hardware performs a
34 or EXC_RETURN and causes the PE to pop from the unexpected stack. Please
35 refer to `ARMv8-M Secure stack sealing advisory notice`_ for more
39 `seal` the stacks. The `ARMv8-M ARM`_ states that the stack should be sealed
42 Both the MSP_S and the PSP_S stacks need to be sealed to mitigate stack
54 the PSP_S and this stack can be separate for each partition or be a common
55 stack depending on whether TF-M is in library mode or IPC model. When the
59 operation to trigger an MSP_S stack underflow, and the CPU could fetch
60 the return PC and PSR from the memory just above MSP_S stack (stack grows
65 is most likely to be initialized memory for most platforms. This is the stack
[all …]
Dsvc_caller_sp_fetching_vulnerability.rst34 handler code relies on the 'SPSEL' bit in 'EXC_RETURN' to get the caller stack
51 Main stack pointer (MSP) is always used in 'Handler mode', which is irrelevant
52 to the value of SPSEL. However, the code above selects secure process stack
55 stack for handling the request in the NSPE caller in 'Handler mode' case.
57 stack pointer register by checking both the PE mode and SPSEL bit. The handler
66 When the vulnerability is happening, PSP_S is the incorrect stack pointer
72 (higher address) of secure thread stack if there is no ongoing secure function
75 When PSP_S is pointing to the stack bottom when this issue happens, the caller
76 context is pointing to the underflowed stack of which the top 2 words are stack
80 Even if a valid SVC number is returned, the stack seal values are part of the
[all …]
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Template/Device_A/Config/
DDevice_ac6.sct8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
48 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
55 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
61 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
66 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
70 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA7/RTE/Device/ARMCA7/
DARMCA7.sct8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
50 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
57 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
63 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
68 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
72 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
DARMCA7_ac6.sct38 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
45 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
51 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
56 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
60 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA9/RTE/Device/ARMCA9/
DARMCA9.sct8 ; This scatter-file places application code, data, stack and heap at suitable addresses in the memo…
50 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
57 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
63 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
68 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
72 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
DARMCA9_ac6.sct38 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
45 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
51 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
56 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
60 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA5/RTE/Device/ARMCA5/
DARMCA5_ac6.sct38 -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
45 -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
51 -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
56 -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
60 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
/trusted-firmware-m-latest/interface/include/
Dconfig_impl.h.template26 /* Trustzone NS agent working stack size. */
34 /* SPM has to have its own stack if Trustzone isn't present. */
49 * stack. It is observed that half of the sum of all partition stack sizes is
52 * modification of the factor based on application situation. The stack size
/trusted-firmware-m-latest/docs/releases/
D1.6.1.rst10 - Correctly apply the stack sealing for the PSP stack in library mode
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Template/Device_M/Config/
DDevice_ac6.sct104 ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
108 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
DDevice_gcc.ld60 /* ARMv8-M stack sealing:
61 to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0
101 * __StackSeal (only if ARMv8-M stack sealing is used)
294 .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (NOLOAD) :
304 /* ARMv8-M stack sealing:
305 to use ARMv8-M stack sealing uncomment '.stackseal' section
317 /* Check if data + heap + stack exceeds RAM limit */
318 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM23S/RTE/Device/ARMCM23/
DARMCM23_ac6.sct108 ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
112 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
DARMCM23_ac6.sct.base@1.1.0108 ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
112 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM55/RTE/Device/ARMCM55/
DARMCM55_ac6.sct108 ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
112 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM85/RTE/Device/ARMCM85/
DARMCM85_ac6.sct115 ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
119 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
/trusted-firmware-m-latest/lib/ext/cryptocell-312-runtime/host/src/tests/integration_cc3x/runtime_integration_test/pal/include/
Drun_integration_pal_log.h54 char stack[10]; \
55 … snprintf(stack, 9, "%d", gRunItStackSize - Test_PalThreadStackHighestWatermark(NULL)); \
56 RUNIT_PRINT(" %5.5s", stack); \
/trusted-firmware-m-latest/platform/ext/common/gcc/
Dtfm_common_ns.ld148 .stack : ALIGN(32)
152 __StackLimit = ADDR(.stack);
153 __StackTop = ADDR(.stack) + SIZEOF(.stack);
/trusted-firmware-m-latest/platform/ext/target/nuvoton/m2351/device/source/gcc/
Dm2351_ns.ld148 .stack : ALIGN(32)
152 __StackLimit = ADDR(.stack);
153 __StackTop = ADDR(.stack) + SIZEOF(.stack);
/trusted-firmware-m-latest/platform/ext/target/nuvoton/m2354/device/source/gcc/
Dm2354_ns.ld148 .stack : ALIGN(32)
152 __StackLimit = ADDR(.stack);
153 __StackTop = ADDR(.stack) + SIZEOF(.stack);
/trusted-firmware-m-latest/platform/ext/target/rpi/rp2350/
Dlinker_bl2.ld250 /* .stack*_dummy section doesn't contains any symbols. It is only
251 * used for linker to calculate size of stack sections, and assign
252 * values to stack symbols later
255 /* by default we put core 0 stack at the end of scratch Y, so that if core 1
256 * stack is not used then all of SCRATCH_X is free.
265 KEEP(*(.stack*))
273 /* stack limit is poorly named, but historically is maximum heap ptr */
279 /* Check if data + heap + stack exceeds RAM limit */
/trusted-firmware-m-latest/platform/ext/target/arm/musca_b1/Device/Source/gcc/
Dmusca_ns.ld154 .stack : ALIGN(32)
158 __StackLimit = ADDR(.stack);
159 __StackTop = ADDR(.stack) + SIZEOF(.stack);
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM85NS/RTE/Device/ARMCM85/
Dac6_linker_script.sct59 …AM0_BASE + __RAM0_SIZE - __STACKSEAL_SIZE) EMPTY -__STACK_SIZE { ; Reserve empty region for stack
63 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM0/RTE/Device/ARMCM0/
Dac6_linker_script.sct59 …AM0_BASE + __RAM0_SIZE - __STACKSEAL_SIZE) EMPTY -__STACK_SIZE { ; Reserve empty region for stack
63 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CM0plus/RTE/Device/ARMCM0P/
Dac6_linker_script.sct59 …AM0_BASE + __RAM0_SIZE - __STACKSEAL_SIZE) EMPTY -__STACK_SIZE { ; Reserve empty region for stack
63 … EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack

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