| /trusted-firmware-m-latest/platform/ext/target/arm/musca_s1/Libraries/ |
| D | mt25ql_flash_lib.c | 139 qspi_ip6514e_send_simple_cmd(dev->controller, WRITE_ENABLE_CMD); in send_write_enable() 162 dev->controller, in set_spi_mode() 203 dev->controller, in set_spi_mode() 216 controller_error = qspi_ip6514e_set_spi_mode(dev->controller, in set_spi_mode() 246 controller_error = qspi_ip6514e_send_read_cmd(dev->controller, in change_dummy_cycles() 265 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, in change_dummy_cycles() 295 controller_error = qspi_ip6514e_send_read_cmd(dev->controller, in wait_program_or_erase_complete() 360 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, in send_boundary_cross_write_cmd() 379 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, in send_boundary_cross_write_cmd() 444 while(!qspi_ip6514e_is_idle(dev->controller)); in mt25ql_config_mode() [all …]
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| /trusted-firmware-m-latest/platform/ext/target/arm/musca_b1/Libraries/ |
| D | mt25ql_flash_lib.c | 139 qspi_ip6514e_send_simple_cmd(dev->controller, WRITE_ENABLE_CMD); in send_write_enable() 162 dev->controller, in set_spi_mode() 203 dev->controller, in set_spi_mode() 216 controller_error = qspi_ip6514e_set_spi_mode(dev->controller, in set_spi_mode() 246 controller_error = qspi_ip6514e_send_read_cmd(dev->controller, in change_dummy_cycles() 265 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, in change_dummy_cycles() 295 controller_error = qspi_ip6514e_send_read_cmd(dev->controller, in wait_program_or_erase_complete() 360 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, in send_boundary_cross_write_cmd() 379 controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, in send_boundary_cross_write_cmd() 444 while(!qspi_ip6514e_is_idle(dev->controller)); in mt25ql_config_mode() [all …]
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| D | mt25ql_flash_lib.h | 95 struct qspi_ip6514e_dev_t *controller; member
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| /trusted-firmware-m-latest/platform/ext/target/arm/corstone1000/Device/Source/ |
| D | device_definition.c | 87 .controller = &AXI_QSPI_DEV_S, 98 .controller = &CFI_DEV_S, 107 .controller = &CFI_DEV_SE_SECURE_FLASH_S, 118 .controller = &AXI_QSPI_DEV_2_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/drivers/flash/sst26vf064b/ |
| D | spi_sst26vf064b_flash_lib.c | 66 ret = spi_transfer_and_receive(dev->controller, in spi_flash_read_reg() 119 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_flash_write_enable() 142 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_flash_unblock() 170 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_configure_status_reg() 205 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_erase_chip() 266 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_erase_sector() 321 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_program_data() 433 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_read() 463 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_sst26vf064b_verify_id() 502 qspi_ret = axi_qspi_initialize(dev->controller); in spi_sst26vf064b_initialize() [all …]
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| D | spi_sst26vf064b_flash_lib.h | 40 struct axi_qspi_dev_t *controller; /* QSPI Flash Controller */ member
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| /trusted-firmware-m-latest/platform/ext/target/arm/drivers/flash/n25q256a/ |
| D | spi_n25q256a_flash_lib.c | 48 ret = spi_transfer_and_receive(dev->controller, send_buf, rcv_buf, 2); in spi_flash_read_reg() 98 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, NULL, 1); in spi_flash_write_enable() 125 qspi_ret = spi_transfer_and_receive(dev->controller, in spi_flash_identify_and_clear_error() 157 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, NULL, 1); in spi_n25q256a_erase_chip() 201 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, NULL, 5); in spi_n25q256a_erase() 257 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, NULL, in spi_n25q256a_program_data() 369 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, rcv_buf, in spi_n25q256a_read() 398 qspi_ret = spi_transfer_and_receive(dev->controller, send_buf, rcv_buf, 7); in spi_n25q256a_verify_id() 435 qspi_ret = axi_qspi_initialize(dev->controller); in spi_n25q256a_initialize() 466 axi_qspi_uninitialize(dev->controller); in spi_n25q256a_uninitialize()
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| D | spi_n25q256a_flash_lib.h | 39 struct axi_qspi_dev_t *controller; /* QSPI Flash Controller */ member
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an552/cmsis_drivers/ |
| D | Driver_Flash_bl2.c | 29 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 36 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| D | Driver_Flash.c | 152 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 159 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/an555/cmsis_drivers/ |
| D | Driver_Flash_bl2.c | 29 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 36 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| D | Driver_Flash.c | 152 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 159 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/an557/cmsis_drivers/ |
| D | Driver_Flash_bl2.c | 29 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 36 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| D | Driver_Flash.c | 152 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 159 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an547/cmsis_drivers/ |
| D | Driver_Flash_bl2.c | 29 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 36 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| D | Driver_Flash.c | 152 (select_qspi_mode(flash_dev->dev->controller) != AXI_QSPI_ERR_NONE)) { in setup() 159 enum axi_qspi_error_t ret = select_xip_mode(flash_dev->dev->controller); in release()
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| /trusted-firmware-m-latest/platform/ext/target/arm/drivers/flash/strata/ |
| D | spi_strataflashj3_flash_lib.c | 33 uint32_t base_addr = dev->controller->cfg->base; in cfi_strataflashj3_erase_chip() 55 uint32_t base_addr = dev->controller->cfg->base; in erase_block() 96 uint32_t base_addr = dev->controller->cfg->base; in cfi_strataflashj3_program_data_byte() 184 uint32_t base_addr = dev->controller->cfg->base ; in cfi_strataflashj3_read() 229 base_addr = dev->controller->cfg->base; in cfi_strataflashj3_verify_id()
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| D | spi_strataflashj3_flash_lib.h | 33 struct cfi_dev_t *controller; /* QSPI Flash Controller */ member
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/an555/device/source/ |
| D | flash_device_definition.c | 31 .controller = &AXI_QSPI_DEV_2_S,
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/an557/device/source/ |
| D | flash_device_definition.c | 31 .controller = &AXI_QSPI_DEV_2_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an547/device/source/ |
| D | flash_device_definition.c | 31 .controller = &AXI_QSPI_DEV_2_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an552/device/source/ |
| D | flash_device_definition.c | 31 .controller = &AXI_QSPI_DEV_2_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/rdfremont/device/ |
| D | rse_expansion_device_definition.c | 57 .controller = &CFI_DEV_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/kronos/device/ |
| D | host_device_definition.c | 74 .controller = &CFI_DEV_S,
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/tc/device/ |
| D | host_device_definition.c | 74 .controller = &CFI_DEV_S,
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