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/trusted-firmware-m-latest/platform/ext/target/nxp/common/Native_Driver/drivers/
Dfsl_common_arm.h148 static inline void _SDK_AtomicLocalSet1Byte(volatile uint8_t *addr, uint8_t bits) in _SDK_AtomicLocalSet1Byte() argument
152 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val |= bits); in _SDK_AtomicLocalSet1Byte()
155 static inline void _SDK_AtomicLocalSet2Byte(volatile uint16_t *addr, uint16_t bits) in _SDK_AtomicLocalSet2Byte() argument
159 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val |= bits); in _SDK_AtomicLocalSet2Byte()
162 static inline void _SDK_AtomicLocalSet4Byte(volatile uint32_t *addr, uint32_t bits) in _SDK_AtomicLocalSet4Byte() argument
166 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val |= bits); in _SDK_AtomicLocalSet4Byte()
169 static inline void _SDK_AtomicLocalClear1Byte(volatile uint8_t *addr, uint8_t bits) in _SDK_AtomicLocalClear1Byte() argument
173 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val &= ~bits); in _SDK_AtomicLocalClear1Byte()
176 static inline void _SDK_AtomicLocalClear2Byte(volatile uint16_t *addr, uint16_t bits) in _SDK_AtomicLocalClear2Byte() argument
180 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val &= ~bits); in _SDK_AtomicLocalClear2Byte()
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/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/RTOS2/Source/
Dos_tick_ptim.c43 uint32_t bits; in OS_Tick_Setup() local
72 for (bits = 0; bits < 4; bits++) { in OS_Tick_Setup()
80 prio = (PTIM_IRQ_PRIORITY << bits) & 0xFFUL; in OS_Tick_Setup()
Dos_tick_gtim.c50 uint32_t prio, bits; in OS_Tick_Setup() local
89 for (bits = 0; bits < 4; bits++) { in OS_Tick_Setup()
97 prio = (GTIM_IRQ_PRIORITY << bits) & 0xFFUL; in OS_Tick_Setup()
/trusted-firmware-m-latest/interface/include/mbedtls/
Dpsa_util.h88 size_t *bits);
103 size_t bits);
165 int mbedtls_ecdsa_raw_to_der(size_t bits, const unsigned char *raw, size_t raw_len,
181 int mbedtls_ecdsa_der_to_raw(size_t bits, const unsigned char *der, size_t der_len,
Decdsa.h44 #define MBEDTLS_ECDSA_MAX_SIG_LEN(bits) \ argument
45 (/*T,L of SEQUENCE*/ ((bits) >= 61 * 8 ? 3 : 2) + \
46 /*T,L of r,s*/ 2 * (((bits) >= 127 * 8 ? 3 : 2) + \
47 /*V of r,s*/ ((bits) + 8) / 8))
Dasn1write.h317 const unsigned char *buf, size_t bits);
339 size_t bits);
/trusted-firmware-m-latest/interface/include/psa/
Dcrypto_struct.h301 psa_key_bits_t MBEDTLS_PRIVATE(bits);
432 size_t bits) in psa_set_key_bits() argument
434 if (bits > PSA_MAX_KEY_BITS) { in psa_set_key_bits()
435 attributes->MBEDTLS_PRIVATE(bits) = PSA_KEY_BITS_TOO_LARGE; in psa_set_key_bits()
437 attributes->MBEDTLS_PRIVATE(bits) = (psa_key_bits_t) bits; in psa_set_key_bits()
444 return attributes->MBEDTLS_PRIVATE(bits); in psa_get_key_bits()
Dcrypto_extra.h1722 uint16_t bits; member
1747 cipher_suite->bits); in psa_pake_cs_get_primitive()
1756 cipher_suite->bits = (uint16_t) (0xFFFF & primitive); in psa_pake_cs_set_primitive()
1768 return cipher_suite->bits; in psa_pake_cs_get_bits()
Dcrypto_sizes.h40 #define PSA_BITS_TO_BYTES(bits) (((bits) + 7u) / 8u) argument
763 #define PSA_KEY_EXPORT_ASN1_INTEGER_MAX_SIZE(bits) \ argument
764 ((bits) / 8u + 5u)
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Source/
Dirq_ctrl_gic.c406 __WEAK int32_t IRQ_SetPriorityGroupBits (uint32_t bits) { in IRQ_SetPriorityGroupBits() argument
409 if (bits == IRQ_PRIORITY_Msk) { in IRQ_SetPriorityGroupBits()
410 bits = 7U; in IRQ_SetPriorityGroupBits()
413 if (bits < 8U) { in IRQ_SetPriorityGroupBits()
414 GIC_SetBinaryPoint (7U - bits); in IRQ_SetPriorityGroupBits()
/trusted-firmware-m-latest/interface/include/multi_core/
Dtfm_mailbox_config.h.in27 * The number of slots should be no more than the number of bits in
30 * calculate the bits in mailbox_queue_status_t and dump it with pragma message.
/trusted-firmware-m-latest/bl2/src/
Dthin_psa_crypto_core.c249 const size_t bits = in psa_import_key() local
258 const size_t bits = PSA_BYTES_TO_BITS((data_length - 1)/2); in psa_import_key()
265 g_key_slot.attr.bits = (psa_key_bits_t)bits; in psa_import_key()
/trusted-firmware-m-latest/docs/platform/cypress/psoc64/libs/core-lib/
DREADME.md14 * `CY_LO8`: Gets the lower 8 bits of a 16-bit value
15 * `CY_HI8`: Gets the upper 8 bits of a 16-bit value
16 * `CY_LO16`: Gets the lower 16 bits of a 32-bit value
17 * `CY_HI16`: Gets the upper 16 bits of a 32-bit value
DRELEASE.md10 * CY_LO8: Gets the lower 8 bits of a 16-bit value
11 * CY_HI8: Gets the upper 8 bits of a 16-bit value
12 * CY_LO16: Gets the lower 16 bits of a 32-bit value
13 * CY_HI16: Gets the upper 16 bits of a 32-bit value
/trusted-firmware-m-latest/secure_fw/partitions/initial_attestation/
DKconfig33 The size of the initial attestation key in bits
/trusted-firmware-m-latest/lib/ext/cryptocell-312-runtime/utils/src/cc3x_boot_cert/examples/enabler_cert/
Dsb_enabler_dbg_cert_rma.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dx509_sb_enabler_dbg_cert_rma.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert_no_pwd.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dx509_sb_enabler_dbg_cert.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert_rma_no_pwd.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
/trusted-firmware-m-latest/lib/ext/cryptocell-312-runtime/utils/src/cc3x_asset_prov_rt/examples/
Dasset_prov_se_512.cfg13 #asset-id = The ICV asset ID in 32 bits hex format (e.g. 0x7000000f).
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/a-profile/
Dirq_ctrl.h183 int32_t IRQ_SetPriorityGroupBits (uint32_t bits);
/trusted-firmware-m-latest/platform/ext/target/arm/musca_b1/Native_Driver/
Dqspi_ip6514e_drv.c153 uint32_t bits, in change_bits_in_word() argument
168 *word = bits; in change_bits_in_word()
181 *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); in change_bits_in_word()
/trusted-firmware-m-latest/platform/ext/target/arm/musca_s1/Native_Driver/
Dqspi_ip6514e_drv.c153 uint32_t bits, in change_bits_in_word() argument
168 *word = bits; in change_bits_in_word()
181 *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); in change_bits_in_word()

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