Searched refs:RCC_PLL2DIVR_PLL2R_Pos (Results 1 – 6 of 6) sorted by relevance
985 … RCC_PLL2DIVR_PLL2R_Pos) & \
1005 …Init->PLL2.PLL2R = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()1285 … RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
2601 …Init->PLL2.PLL2R = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()3046 … RCC_PLL2DIVR_PLL2R_Pos) + (float_t)1)); in HAL_RCCEx_GetPLL2ClockFreq()
1454 … ((((__PLL2R__) - 1U) << RCC_PLL2DIVR_PLL2R_Pos) & RCC_PLL2DIVR_PLL2R))); \
15612 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro15613 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…15615 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…15616 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…15617 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…15618 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…15619 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…15620 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…15621 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
16040 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro16041 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…16043 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…16044 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…16045 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…16046 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…16047 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…16048 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…16049 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
