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Searched refs:MPU_RASR_C_Pos (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/m-profile/
Darmv7m_mpu.h89 (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/
Dcore_sc000.h602 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
603 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …
Dcore_cm0plus.h586 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
587 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …
Dcore_cm3.h1212 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
1213 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …
Dcore_sc300.h1195 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
1196 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …
Dcore_cm4.h1277 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
1278 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …
Dcore_cm7.h1496 #define MPU_RASR_C_Pos 17U /*!< MPU … macro
1497 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU …