Home
last modified time | relevance | path

Searched refs:MMU_TTSection (Results 1 – 5 of 5) sorted by relevance

/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA5/RTE/Device/ARMCA5/
Dmmu_ARMCA5.c145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A5_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A5_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A5_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A5_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A5_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A5_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA7/RTE/Device/ARMCA7/
Dmmu_ARMCA7.c145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A7_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A7_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A7_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A7_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Layer/Target/CA9/RTE/Device/ARMCA9/
Dmmu_ARMCA9.c145 MMU_TTSection (TTB_BASE, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
171MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
172MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
175 MMU_TTSection (TTB_BASE, VE_A9_MP_FLASH_BASE0 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
176 MMU_TTSection (TTB_BASE, VE_A9_MP_FLASH_BASE1 , 64, Sect_Device_RO); // 64MB NOR in MMU_CreateTranslationTable()
177 MMU_TTSection (TTB_BASE, VE_A9_MP_SRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
178 MMU_TTSection (TTB_BASE, VE_A9_MP_VRAM_BASE , 32, Sect_Device_RW); // 32MB RAM in MMU_CreateTranslationTable()
179 MMU_TTSection (TTB_BASE, VE_A9_MP_ETHERNET_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
180 MMU_TTSection (TTB_BASE, VE_A9_MP_USB_BASE , 16, Sect_Device_RW); in MMU_CreateTranslationTable()
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Template/Device_A/Source/
Dmmu_Device.c143 MMU_TTSection (&Image$$TTB$$ZI$$Base, 0, 4096, DESCRIPTOR_FAULT); in MMU_CreateTranslationTable()
167MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$VECTORS$$Base , 1U, Sect_Normal_Cod… in MMU_CreateTranslationTable()
168MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$RW_DATA$$Base , 1U, Sect_Normal_RW); in MMU_CreateTranslationTable()
169MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$ZI_DATA$$Base , 1U, Sect_Normal_RW); in MMU_CreateTranslationTable()
172 MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$TTB$$ZI$$Base , 2043U, Sect_Normal); in MMU_CreateTranslationTable()
175MMU_TTSection (&Image$$TTB$$ZI$$Base, <DeviceAbbreviation>_FLASH_BASE0 , 64U, Sect_Device_RO); in MMU_CreateTranslationTable()
176MMU_TTSection (&Image$$TTB$$ZI$$Base, <DeviceAbbreviation>_FLASH_BASE1 , 64U, Sect_Device_RO); in MMU_CreateTranslationTable()
177MMU_TTSection (&Image$$TTB$$ZI$$Base, <DeviceAbbreviation>_SRAM_BASE , 64U, Sect_Device_RW); in MMU_CreateTranslationTable()
178MMU_TTSection (&Image$$TTB$$ZI$$Base, <DeviceAbbreviation>_VRAM_BASE , 32U, Sect_Device_RW); in MMU_CreateTranslationTable()
179MMU_TTSection (&Image$$TTB$$ZI$$Base, <DeviceAbbreviation>_ETHERNET_BASE , 16U, Sect_Device_RW); in MMU_CreateTranslationTable()
[all …]
/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/
Dcore_ca.h2867 __STATIC_INLINE void MMU_TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t d… in MMU_TTSection() function