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Searched refs:FLASH_BASE_S (Results 1 – 12 of 12) sorted by relevance

/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32l5xx/bl2/
Dtfm_low_level_security.c548 region_cfg.region_base = FLASH_BASE_S + FLASH_AREA_0_OFFSET ; in mpu_init_cfg()
549 region_cfg.region_limit = FLASH_BASE_S + FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE - 1; in mpu_init_cfg()
559 region_cfg.region_base = FLASH_BASE_S + FLASH_AREA_1_OFFSET ; in mpu_init_cfg()
560 region_cfg.region_limit = FLASH_BASE_S + FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE - 1; in mpu_init_cfg()
570 region_cfg.region_base = FLASH_BASE_S; in mpu_init_cfg()
571 region_cfg.region_limit = FLASH_BASE_S + FLASH_AREA_BL2_OFFSET - 1; in mpu_init_cfg()
581 region_cfg.region_base = FLASH_BASE_S + FLASH_AREA_BL2_NOHDP_OFFSET + FLASH_AREA_BL2_NOHDP_SIZE; in mpu_init_cfg()
582 region_cfg.region_limit = FLASH_BASE_S + FLASH_AREA_0_OFFSET - 1; in mpu_init_cfg()
700 region_cfg.region_base = FLASH_BASE_S + FLASH_AREA_0_OFFSET ; in mpu_appli_cfg()
701 region_cfg.region_limit = FLASH_BASE_S + FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE - 1; in mpu_appli_cfg()
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32h5xx/bl2/
Dlow_level_security.c70 FLASH_BASE_S + FLASH_AREA_BL2_OFFSET,
71 FLASH_BASE_S + FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE - 1,
87 FLASH_BASE_S + FLASH_AREA_SCRATCH_OFFSET,
88 FLASH_BASE_S + FLASH_AREA_SCRATCH_OFFSET + FLASH_AREA_SCRATCH_SIZE - 1,
104 FLASH_BASE_S + FLASH_AREA_BEGIN_OFFSET,
105 FLASH_BASE_S + FLASH_AREA_END_OFFSET - 1,
243 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET,
244 …FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE - 1 - (~MPU_RLAR_LIMIT_Ms…
259 …FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE - (~MPU_RLAR_LIMIT_Msk +1…
260 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE - 1,
[all …]
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32u5xx/bl2/
Dlow_level_security.c72 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET,
73 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE,
87 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE,
89 FLASH_BASE_S + NS_IMAGE_SECONDARY_PARTITION_OFFSET + FLASH_NS_PARTITION_SIZE,
91 …FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE + FLASH_NS_PARTITION_SIZE,
106 FLASH_BASE_S,
107 FLASH_BASE_S + FLASH_AREA_BL2_OFFSET,
121 FLASH_BASE_S + FLASH_AREA_BL2_NOHDP_OFFSET + FLASH_AREA_BL2_NOHDP_SIZE,
122 FLASH_BASE_S + FLASH_AREA_0_OFFSET,
265 FLASH_BASE_S + S_IMAGE_PRIMARY_PARTITION_OFFSET,
[all …]
/trusted-firmware-m-latest/platform/ext/target/stm/common/hal/CMSIS_Driver/
Dlow_level_flash.c437 flash_base = (uint32_t)FLASH_BASE_S; in Flash_ProgramData()
600 pt = (uint32_t *)((uint32_t)FLASH_BASE_S + addr); in Flash_EraseSector()
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32u5xx/secure/
Dtarget_cfg.c518 …priv(0x0, (uint32_t)(&REGION_NAME(Image$$, TFM_UNPRIV_CODE_START, $$RO$$Base)) - FLASH_BASE_S - 1); in gtzc_init_cfg()
614 …priv(0x0, (uint32_t)(&REGION_NAME(Image$$, TFM_UNPRIV_CODE_START, $$RO$$Base)) - FLASH_BASE_S - 1); in gtzc_init_cfg()
Dtfm_hal_isolation.c68 FLASH_BASE_S + FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE - 32,
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32h5xx/secure/
Dtarget_cfg.c530 …priv(0x0, (uint32_t)(&REGION_NAME(Image$$, TFM_UNPRIV_CODE_START, $$RO$$Base)) - FLASH_BASE_S - 1); in gtzc_init_cfg()
637 …priv(0x0, (uint32_t)(&REGION_NAME(Image$$, TFM_UNPRIV_CODE_START, $$RO$$Base)) - FLASH_BASE_S - 1); in gtzc_init_cfg()
Dtfm_hal_isolation.c75 FLASH_BASE_S + FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE - 32,
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32l5xx/Device/Include/
Dstm32l552xx.h1507 #define FLASH_BASE_S (0x0C000000UL) /*!< FLASH(up to 512 KB) base address */ macro
2070 #define FLASH_BASE FLASH_BASE_S
Dstm32l562xx.h1588 #define FLASH_BASE_S (0x0C000000UL) /*!< FLASH(up to 512 KB) base address */ macro
2172 #define FLASH_BASE FLASH_BASE_S
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32u5xx/Device/Include/
Dstm32u585xx.h1911 #define FLASH_BASE_S (0x0C000000UL) /*!< FLASH (up to 2 MB) secure base address */ macro
2528 #define FLASH_BASE FLASH_BASE_S
/trusted-firmware-m-latest/platform/ext/target/stm/common/stm32h5xx/Device/Include/
Dstm32h573xx.h2003 #define FLASH_BASE_S (0x0C000000UL) /*!< FLASH (up to 2 MB) secure base address */ macro
2696 #define FLASH_BASE FLASH_BASE_S