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Searched refs:CPU0_IDENTITY_BASE_NS (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-m-latest/platform/ext/target/arm/rse/common/partition/
Dplatform_base_address.h41 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an547/partition/
Dplatform_base_address.h39 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/an557/partition/
Dplatform_base_address.h37 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/partition/
Dplatform_base_address.h42 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an552/partition/
Dplatform_base_address.h39 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/fvp/partition/
Dplatform_base_address.h39 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/partition/
Dplatform_base_address.h41 #define CPU0_IDENTITY_BASE_NS 0x4001F000 /* CPU 0 Identity Block Non-Secure base address… macro