Searched refs:CLLR (Results 1 – 6 of 6) sorted by relevance
362 hdma->Instance->CLLR = 0U; in HAL_DMA_DeInit()1041 if (hdma->Instance->CLLR == 0U) in HAL_DMA_IRQHandler()1686 WRITE_REG(hdma->Instance->CLLR, 0U); in DMA_Init()
716 hdma->Instance->CLLR = 0U; in HAL_DMAEx_List_DeInit()843 hdma->Instance->CLLR = ((uint32_t)hdma->LinkedListQueue->Head & DMA_CLLR_LA) | cllr_mask; in HAL_DMAEx_List_Start()922 hdma->Instance->CLLR = ((uint32_t)hdma->LinkedListQueue->Head & DMA_CLLR_LA) | cllr_mask; in HAL_DMAEx_List_Start_IT()3683 WRITE_REG(hdma->Instance->CLLR, 0U); in DMA_List_Init()
363 hdma->Instance->CLLR = 0U; in HAL_DMA_DeInit()1042 if (hdma->Instance->CLLR == 0U) in HAL_DMA_IRQHandler()1680 WRITE_REG(hdma->Instance->CLLR, 0U); in DMA_Init()
723 hdma->Instance->CLLR = 0U; in HAL_DMAEx_List_DeInit()849 hdma->Instance->CLLR = ((uint32_t)hdma->LinkedListQueue->Head & DMA_CLLR_LA) | cllr_mask; in HAL_DMAEx_List_Start()928 hdma->Instance->CLLR = ((uint32_t)hdma->LinkedListQueue->Head & DMA_CLLR_LA) | cllr_mask; in HAL_DMAEx_List_Start_IT()3689 WRITE_REG(hdma->Instance->CLLR, 0U); in DMA_List_Init()
458 …__IO uint32_t CLLR; /*!< DMA channel x linked-list address register, Address offset: … member
541 …__IO uint32_t CLLR; /*!< DMA channel x linked-list address register, Address offset: … member