1 /*
2  * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 /**
18  * \file tram_drv.c
19  * \brief Driver for Arm TRAM.
20  */
21 
22 #include "tram_drv.h"
23 
24 #include "tfm_hal_device_header.h"
25 
26 #ifdef TRAM_CONFIG_EXTERNAL_DPA_HARDENED_WORD_COPY
27 #include "dpa_hardened_word_copy.h"
28 #endif /* TRAM_CONFIG_EXTERNAL_DPA_HARDENED_WORD_COPY */
29 
30 struct _tram_reg_map_t {
31     __IM  uint32_t trbc;
32                 /*!< Offset: 0x000 (R/ ) TRAM Build Configuration Register */
33     __IOM uint32_t trc;
34                 /*!< Offset: 0x004 (R/W) TRAM Configuration Register */
35     __OM  uint32_t trkey[8];
36                 /*!< Offset: 0x008 ( /W) TRAM Key Register */
37     __IOM uint32_t reserved_0[0x3E9];
38                 /*!< Offset: 0x28-0xFCC Reserved */
39     __IM uint32_t pidr4;
40                 /*!< Offset: 0xFD0 (R/ ) Peripheral ID 4 */
41     __IOM uint32_t reserved_1[3];
42                 /*!< Offset: 0xFD4-0xFDC Reserved */
43     __IM  uint32_t pidr0;
44                 /*!< Offset: 0xFE0 (R/ ) Peripheral ID 0 */
45     __IM  uint32_t pidr1;
46                 /*!< Offset: 0xFE4 (R/ ) Peripheral ID 1 */
47     __IM  uint32_t pidr2;
48                 /*!< Offset: 0xFE8 (R/ ) Peripheral ID 2 */
49     __IM  uint32_t pidr3;
50                 /*!< Offset: 0xFEC (R/ ) Peripheral ID 3 */
51     __IM  uint32_t cidr0;
52                 /*!< Offset: 0xFF0 (R/ ) Component ID 0 */
53     __IM  uint32_t cidr1;
54                 /*!< Offset: 0xFF4 (R/ ) Component ID 1 */
55     __IM  uint32_t cidr2;
56                 /*!< Offset: 0xFF8 (R/ ) Component ID 2 */
57     __IM  uint32_t cidr3;
58                 /*!< Offset: 0xFFC (R/ ) Component ID 3 */
59 };
60 
tram_set_key(struct tram_dev_t * dev,const uint32_t * key)61 void tram_set_key(struct tram_dev_t *dev, const uint32_t *key)
62 {
63     struct _tram_reg_map_t* p_tram = (struct _tram_reg_map_t*)dev->cfg->base;
64     uint32_t idx;
65 
66 #ifndef TRAM_CONFIG_EXTERNAL_DPA_HARDENED_WORD_COPY
67     for (idx = 0; idx < (sizeof(p_tram->trkey) / sizeof(uint32_t)); idx++) {
68         p_tram->trkey[idx] = key[idx];
69     }
70 #else
71     (void)idx;
72     dpa_hardened_word_copy(p_tram->trkey, key, (sizeof(p_tram->trkey) / sizeof(uint32_t));
73 #endif /* TRAM_CONFIG_EXTERNAL_DPA_HARDENED_WORD_COPY */
74 }
75 
76 void tram_wipe_key(struct tram_dev_t *dev)
77 {
78     struct _tram_reg_map_t* p_tram = (struct _tram_reg_map_t*)dev->cfg->base;
79 
80     p_tram->trc |= (0b1 << 1);
81 }
82 
83 void tram_enable_encryption(struct tram_dev_t *dev)
84 {
85     struct _tram_reg_map_t* p_tram = (struct _tram_reg_map_t*)dev->cfg->base;
86 
87     p_tram->trc |= 0b1;
88 }
89 
90 void tram_disable_encryption(struct tram_dev_t *dev)
91 {
92     struct _tram_reg_map_t* p_tram = (struct _tram_reg_map_t*)dev->cfg->base;
93 
94     p_tram->trc &= ~0b1;
95 }
96