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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32l5xx/secure/
Dtarget_cfg.c182 uint32_t index; in unsecure_sram1() local
197 for (index = 0; index < 768; index++) in unsecure_sram1()
200 if (!(index & 0x1f)) in unsecure_sram1()
204 if ((index >= block_start) && (index < block_end)) in unsecure_sram1()
206 regwrite = regwrite & ~(1 << (index & 0x1f)); in unsecure_sram1()
209 if ((index & 0x1f) == 0x1f) in unsecure_sram1()
211 MPCBB_desc.AttributeConfig.MPCBB_SecConfig_array[index >> 5] = regwrite; in unsecure_sram1()
225 uint32_t index; in unsecure_sram2() local
240 for (index = 0; index < 256; index++) in unsecure_sram2()
243 if (!(index & 0x1f)) in unsecure_sram2()
[all …]
/trusted-firmware-m-3.7.0/platform/ext/target/nxp/common/Native_Driver/drivers/
Dfsl_gpio.c153 void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask) in GPIO_PortEnableInterrupts() argument
155 if ((uint32_t)kGPIO_InterruptA == index) in GPIO_PortEnableInterrupts()
159 else if ((uint32_t)kGPIO_InterruptB == index) in GPIO_PortEnableInterrupts()
177 void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask) in GPIO_PortDisableInterrupts() argument
179 if ((uint32_t)kGPIO_InterruptA == index) in GPIO_PortDisableInterrupts()
183 else if ((uint32_t)kGPIO_InterruptB == index) in GPIO_PortDisableInterrupts()
202 void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask) in GPIO_PortClearInterruptFlags() argument
204 if ((uint32_t)kGPIO_InterruptA == index) in GPIO_PortClearInterruptFlags()
208 else if ((uint32_t)kGPIO_InterruptB == index) in GPIO_PortClearInterruptFlags()
226 uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index) in GPIO_PortGetInterruptStatus() argument
[all …]
Dfsl_ctimer.c33 static void CTIMER_GenericIRQHandler(uint32_t index);
129 uint32_t index = CTIMER_GetInstance(base); in CTIMER_Deinit() local
135 CLOCK_DisableClock(s_ctimerClocks[index]); in CTIMER_Deinit()
139 (void)DisableIRQ(s_ctimerIRQ[index]); in CTIMER_Deinit()
203 uint32_t index = CTIMER_GetInstance(base); in CTIMER_SetupPwm() local
253 (void)EnableIRQ(s_ctimerIRQ[index]); in CTIMER_SetupPwm()
293 uint32_t index = CTIMER_GetInstance(base); in CTIMER_SetupPwmPeriod() local
330 (void)EnableIRQ(s_ctimerIRQ[index]); in CTIMER_SetupPwmPeriod()
387 uint32_t index = CTIMER_GetInstance(base); in CTIMER_SetupMatch() local
416 (void)EnableIRQ(s_ctimerIRQ[index]); in CTIMER_SetupMatch()
[all …]
Dfsl_gpio.h288 void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
298 void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
309 void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
319 uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);
329 void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
339 void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
350 void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
/trusted-firmware-m-3.7.0/docs/platform/
Dindex.rst10 Arm <arm/index>
11 ArmChina <armchina/index>
12 Cypress <cypress/index>
13 Laird Connectivity <lairdconnectivity/index>
14 Nordic <nordic_nrf/index>
15 Nuvoton <nuvoton/index>
16 NXP <nxp/index>
17 STMICROELECTRONICS <stm/index>
/trusted-firmware-m-3.7.0/lib/ext/cryptocell-312-runtime/utils/src/dmpu_asset_pkg_util/common/
Ddmpu_common.c80 int index = 0; in AesCmacKeyDerivation() local
99 dataIn[index++] = 0x1; in AesCmacKeyDerivation()
100 memcpy(&dataIn[index], pLabel, labelSize); in AesCmacKeyDerivation()
101 index += labelSize; in AesCmacKeyDerivation()
102 dataIn[index++] = 0x0; in AesCmacKeyDerivation()
103 memcpy(&dataIn[index], pContext, contextSize); in AesCmacKeyDerivation()
104 index += contextSize; in AesCmacKeyDerivation()
105 dataIn[index++] = outKeySize*CC_BITS_IN_BYTE; // size of the key in bits in AesCmacKeyDerivation()
107 UTIL_LOG_BYTE_BUFF("dataIn", dataIn, index); in AesCmacKeyDerivation()
109 rc = CC_CommonAesCmacEncrypt(dataIn, index, in AesCmacKeyDerivation()
/trusted-firmware-m-3.7.0/secure_fw/spm/include/interface/
Dsvc_num.h55 #define TFM_SVC_NUM_SPM_THREAD(index) ((index) & TFM_SVC_NUM_INDEX_MSK) argument
57 #define TFM_SVC_NUM_SPM_HANDLER(index) (TFM_SVC_NUM_HANDLER_MODE_MSK | \ argument
58 ((index) & TFM_SVC_NUM_INDEX_MSK))
60 #define TFM_SVC_NUM_PSA_API_THREAD(index) (TFM_SVC_NUM_PSA_API_MSK | \ argument
61 ((index) & TFM_SVC_NUM_INDEX_MSK))
63 #define TFM_SVC_NUM_PLATFORM_THREAD(index) (TFM_SVC_NUM_PLATFORM_MSK | \ argument
64 ((index) & TFM_SVC_NUM_INDEX_MSK))
66 #define TFM_SVC_NUM_PLATFORM_HANDLER(index) (TFM_SVC_NUM_PLATFORM_MSK | \ argument
68 ((index) & TFM_SVC_NUM_INDEX_MSK))
/trusted-firmware-m-3.7.0/lib/ext/cryptocell-312-runtime/codesafe/src/secure_boot_debug/util/
Dutil_asn1_parser.c34 static CCError_t UTIL_Asn1ReadItemLength(uint8_t *pInStr, uint32_t *itemLen, uint8_t *index) in UTIL_Asn1ReadItemLength() argument
44 *index = *index + 1; in UTIL_Asn1ReadItemLength()
59 *index = *index + currVal + 1; in UTIL_Asn1ReadItemLength()
79 pAsn1Data->index = 1; in UTIL_Asn1ReadItemVerifyTag()
80 error = UTIL_Asn1ReadItemLength(pInStr, &(pAsn1Data->itemSize), &(pAsn1Data->index)); in UTIL_Asn1ReadItemVerifyTag()
98 pAsn1Data->index = 1; in UTIL_Asn1ReadItemVerifyTagFW()
99 error = UTIL_Asn1ReadItemLength(tempCertPtr, &(pAsn1Data->itemSize), &(pAsn1Data->index)); in UTIL_Asn1ReadItemVerifyTagFW()
105 *ppInStr = *ppInStr + pAsn1Data->index; in UTIL_Asn1ReadItemVerifyTagFW()
Dutil.h61 uint8_t index;\
63 for (index = 0; index < numOfBytes; index ++){\
64 outWord |= (*(inPtr + index)<<8*index);\
/trusted-firmware-m-3.7.0/platform/ext/target/arm/corstone1000/io/
Dio_flash.c141 size_t index = find_flash_dev_specs(dev_spec); in flash_dev_open() local
144 assert(flashs_ops[index].read && flashs_ops[index].write); in flash_dev_open()
146 flash_dev_specs[index] = dev_spec; in flash_dev_open()
147 flash_driver = flash_dev_specs[index]->flash_driver; in flash_dev_open()
149 block_dev_spec[index].block_size = flash_driver->GetInfo()->sector_size; in flash_dev_open()
150 block_dev_spec[index].buffer.offset = flash_dev_specs[index]->buffer; in flash_dev_open()
151 block_dev_spec[index].buffer.length = flash_dev_specs[index]->bufferlen; in flash_dev_open()
152 block_dev_spec[index].ops = flashs_ops[index]; in flash_dev_open()
156 block_dev_connectors[index].dev_open(&block_dev_spec[index], dev_info); in flash_dev_open()
Dio_storage.c87 for (unsigned int index = 0; index < MAX_IO_HANDLES; ++index) { in find_first_entity() local
88 if (entity_map[index] == entity) { in find_first_entity()
90 *index_out = index; in find_first_entity()
103 unsigned int index = 0; in allocate_entity() local
104 result = find_first_entity(NULL, &index); in allocate_entity()
106 *entity = &entity_pool[index]; in allocate_entity()
107 entity_map[index] = &entity_pool[index]; in allocate_entity()
117 unsigned int index = 0; in free_entity() local
120 result = find_first_entity(entity, &index); in free_entity()
122 entity_map[index] = NULL; in free_entity()
/trusted-firmware-m-3.7.0/docs/
Dindex.rst17 <a href="getting_started/index.html">
25 <a href="platform/index.html">
32 <a href="contributing/index.html">
40 <a href="integration_guide/index.html">
47 <a href="design_docs/index.html">
54 <a href="security/index.html">
62 <a href="releases/index.html">
76 introduction/index
77 Getting Started <getting_started/index>
78 security/index
[all …]
/trusted-firmware-m-3.7.0/platform/ext/cmsis/CMSIS/Driver/VIO/Source/
Dvio_memory.c68 uint32_t index = id; in vioSetValue() local
70 if (index >= VIO_VALUE_NUM) { in vioSetValue()
74 vioValue[index] = value; in vioSetValue()
79 uint32_t index = id; in vioGetValue() local
82 if (index >= VIO_VALUE_NUM) { in vioGetValue()
86 value = vioValue[index]; in vioGetValue()
Dvio.c118 uint32_t index = id; in vioSetValue() local
124 if (index >= VIO_VALUE_NUM) { in vioSetValue()
128 vioValue[index] = value; in vioSetValue()
138 uint32_t index = id; in vioGetValue() local
145 if (index >= VIO_VALUE_NUM) { in vioGetValue()
155 value = vioValue[index]; in vioGetValue()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/bl2/
Dboot_hal_bl2.c459 uint32_t index; in boot_clear_bl2_ram_area() local
462 for (index = 0; index < (BL2_DATA_SIZE / 4); index++) in boot_clear_bl2_ram_area()
464 pt[index] = 0; in boot_clear_bl2_ram_area()
497 uint32_t index; in boot_clean_ns_ram_area() local
499 for (index = 0; index < (_SRAM1_SIZE_MAX / 4); index++) in boot_clean_ns_ram_area()
501 pt[index] = 0; in boot_clean_ns_ram_area()
504 for (index = 0; index < 24 ; index++) in boot_clean_ns_ram_area()
507 GTZC_MPCBB1_S->SECCFGR[index] = 0; in boot_clean_ns_ram_area()
510 for (index = 0; index < (BL2_DATA_SIZE / 4); index++) in boot_clean_ns_ram_area()
512 pt[index] = 0; in boot_clean_ns_ram_area()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/bl2/
Dboot_hal_bl2.c475 uint32_t index; in boot_clear_bl2_ram_area() local
478 for (index = 0; index < (BL2_DATA_SIZE / 4); index++) in boot_clear_bl2_ram_area()
480 pt[index] = 0; in boot_clear_bl2_ram_area()
513 uint32_t index; in boot_clean_ns_ram_area() local
515 for (index = 0; index < (_SRAM1_SIZE_MAX / 4); index++) in boot_clean_ns_ram_area()
517 pt[index] = 0; in boot_clean_ns_ram_area()
520 for (index = 0; index < 24 ; index++) in boot_clean_ns_ram_area()
523 GTZC_MPCBB1_S->SECCFGR[index] = 0; in boot_clean_ns_ram_area()
526 for (index = 0; index < (BL2_DATA_SIZE / 4); index++) in boot_clean_ns_ram_area()
528 pt[index] = 0; in boot_clean_ns_ram_area()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/secure/
Dtarget_cfg.c369 uint32_t index; in gtzc_config_sram() local
386 for (index = 0; index < (max_size/MPCBB_BLOCK_SIZE); index++) in gtzc_config_sram()
389 if (!(index & 0x1f)) in gtzc_config_sram()
392 secure_regwrite = MPCBB_desc.AttributeConfig.MPCBB_SecConfig_array[index >> 5]; in gtzc_config_sram()
393 privilege_regwrite = MPCBB_desc.AttributeConfig.MPCBB_PrivConfig_array[index >> 5]; in gtzc_config_sram()
395 if ((index >= block_start) && (index < block_end)) in gtzc_config_sram()
399 secure_regwrite &= ~(1 << (index & 0x1f)); in gtzc_config_sram()
402 secure_regwrite |= (1 << (index & 0x1f)); in gtzc_config_sram()
406 privilege_regwrite &= ~(1 << (index & 0x1f)); in gtzc_config_sram()
409 privilege_regwrite |= (1 << (index & 0x1f)); in gtzc_config_sram()
[all …]
/trusted-firmware-m-3.7.0/lib/ext/cryptocell-312-runtime/utils/src/cmpu_asset_pkg_util/lib/
Dmain.c81 int index = 0; in AesCmacKeyDerivation() local
100 dataIn[index++] = 0x1; in AesCmacKeyDerivation()
101 memcpy(&dataIn[index], pLabel, labelSize); in AesCmacKeyDerivation()
102 index += labelSize; in AesCmacKeyDerivation()
103 dataIn[index++] = 0x0; in AesCmacKeyDerivation()
104 memcpy(&dataIn[index], pContext, contextSize); in AesCmacKeyDerivation()
105 index += contextSize; in AesCmacKeyDerivation()
106 dataIn[index++] = outKeySize*CC_BITS_IN_BYTE; // size of the key in bits in AesCmacKeyDerivation()
108 UTIL_LOG_BYTE_BUFF("dataIn", dataIn, index); in AesCmacKeyDerivation()
110 rc = CC_CommonAesCmacEncrypt(dataIn, index, in AesCmacKeyDerivation()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/secure/
Dtarget_cfg.c376 uint32_t index; in gtzc_config_sram() local
394 for (index = 0; index < (max_size/MPCBB_BLOCK_SIZE); index++) in gtzc_config_sram()
397 if (!(index & 0x1f)) in gtzc_config_sram()
400 secure_regwrite = MPCBB_desc.AttributeConfig.MPCBB_SecConfig_array[index >> 5]; in gtzc_config_sram()
401 privilege_regwrite = MPCBB_desc.AttributeConfig.MPCBB_PrivConfig_array[index >> 5]; in gtzc_config_sram()
403 if ((index >= block_start) && (index < block_end)) in gtzc_config_sram()
407 secure_regwrite &= ~(1 << (index & 0x1f)); in gtzc_config_sram()
410 secure_regwrite |= (1 << (index & 0x1f)); in gtzc_config_sram()
414 privilege_regwrite &= ~(1 << (index & 0x1f)); in gtzc_config_sram()
417 privilege_regwrite |= (1 << (index & 0x1f)); in gtzc_config_sram()
[all …]
/trusted-firmware-m-3.7.0/docs/design_docs/
Dindex.rst7 Secure Boot <booting/index>
8 Dual CPU <dual-cpu/index>
9 Secure Services <services/index>
10 Software Design <software/index>
/trusted-firmware-m-3.7.0/docs/integration_guide/platform/
Ddocumenting_platform.rst31 - A vendor is represented by a subfolder with `index.rst` as an entry
35 - A vendor's `index.rst` shall carry a TOCtree structure with a list of all
58 3. Create a file `/docs/platform/ABCD123/index.rst` with a platform entry, presuming
59 it's location in `/docs/platform/ABCD123/Secure_1024/index.rst`:
68 Secure 1024 <Secure_1024/index>
70 4. Finally, update `/docs/platform/index.rst` with a new vendor name:
82 Arm <arm/index.rst>
83 NXP <nxp/index.rst>
84 Cypress <cypress/index.rst>
86 ABCD123 <ABCD123/index.rst>
/trusted-firmware-m-3.7.0/platform/ext/target/arm/corstone1000/rse_comms/
Drse_comms_queue.c24 static size_t advance(size_t index) in advance() argument
26 if (++index == QUEUE_SIZE) { in advance()
27 index = 0; in advance()
29 return index; in advance()
/trusted-firmware-m-3.7.0/platform/ext/target/arm/rse/common/rse_comms/
Drse_comms_queue.c24 static size_t advance(size_t index) in advance() argument
26 if (++index == QUEUE_SIZE) { in advance()
27 index = 0; in advance()
29 return index; in advance()
/trusted-firmware-m-3.7.0/lib/ext/cryptocell-312-runtime/host/src/cc3x_productionlib/common/
Dprod_util.c122 uint32_t index = 0; in CC_PROD_BitListFromNum() local
124 for (index = 0; index < wordBuffSize; index++) { in CC_PROD_BitListFromNum()
125 …pWordBuff[index] = CC_32BIT_MAX_VALUE >> (CC_BITS_IN_32BIT_WORD - PROD_MIN(numVal, CC_BITS_IN_32BI… in CC_PROD_BitListFromNum()
143 uint32_t index = 0; in CC_PROD_GetZeroCount() local
146 for (index = 0; index < buffWordSize; index++) { in CC_PROD_GetZeroCount()
147 val = pBuff[index]; in CC_PROD_GetZeroCount()
/trusted-firmware-m-3.7.0/lib/ext/cryptocell-312-runtime/host/src/tests/common/
Dapplet_list.h44 #define IS_LAST_PRIV_SLOT(slot, index, numSlots) ((index == numSlots-2)?IS_PRIV_SLOT(slot):1) argument
47 #define IS_NOT_LAST_SRAM_SLOT(slot, index, numSlots) ((index == numSlots-2)?(!(IS_SRAM_SLOT(slot)))… argument

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