Searched refs:base_address (Results 1 – 5 of 5) sorted by relevance
| /trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/hal/Src/ |
| D | stm32u5xx_hal_gtzc.c | 990 uint32_t base_address; in HAL_GTZC_MPCBB_ConfigMemAttributes() local
1010 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1016 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1022 base_address = SRAM2_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1028 base_address = SRAM2_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1034 base_address = SRAM3_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1040 base_address = SRAM3_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1046 base_address = SRAM4_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1052 base_address = SRAM4_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1060 block_start = (MemAddress - base_address) / GTZC_MPCBB_BLOCK_SIZE; in HAL_GTZC_MPCBB_ConfigMemAttributes()
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| /trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/hal/Src/ |
| D | stm32h5xx_hal_gtzc.c | 1027 uint32_t base_address; in HAL_GTZC_MPCBB_ConfigMemAttributes() local
1047 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1054 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1061 base_address = SRAM2_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1068 base_address = SRAM2_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1076 base_address = SRAM3_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1082 base_address = SRAM3_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1091 block_start = (MemAddress - base_address) / GTZC_MPCBB_BLOCK_SIZE; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1173 uint32_t base_address; in HAL_GTZC_MPCBB_GetConfigMemAttributes() local
1192 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
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| /trusted-firmware-m-3.7.0/lib/ext/ethos_u_core_driver/ |
| D | 001-Remove-malloc-usage.patch | 9 -struct ethosu_device *ethosu_dev_init(void *const base_address, uint32_t secure_enable, uint32_t p…
28 -struct ethosu_device *ethosu_dev_init(void *const base_address, uint32_t secure_enable, uint32_t p…
38 - dev->reg = (volatile struct NPU_REG *)base_address;
45 @@ -96,16 +85,15 @@ struct ethosu_device *ethosu_dev_init(void *const base_address, uint32_t secure_
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| /trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32l5xx/hal/Src/ |
| D | stm32l5xx_hal_gtzc.c | 835 uint32_t base_address, end_address; in HAL_GTZC_MPCBB_ConfigMemAttributes() local
851 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
857 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
863 base_address = SRAM2_BASE_NS; in HAL_GTZC_MPCBB_ConfigMemAttributes()
869 base_address = SRAM2_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
877 block_start = (MemAddress - base_address) / GTZC_MPCBB_BLOCK_SIZE; in HAL_GTZC_MPCBB_ConfigMemAttributes()
930 uint32_t base_address, end_address; in HAL_GTZC_MPCBB_GetConfigMemAttributes() local
946 base_address = SRAM1_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
952 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
958 base_address = SRAM2_BASE_NS; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
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| /trusted-firmware-m-3.7.0/platform/ext/cmsis/CMSIS/Core/Include/ |
| D | core_ca.h | 2867 __STATIC_INLINE void MMU_TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t d… in MMU_TTSection() argument
2873 offset = base_address >> 20; in MMU_TTSection()
2874 entry = (base_address & 0xFFF00000) | descriptor_l1; in MMU_TTSection()
2897 __STATIC_INLINE void MMU_TTPage4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t de… in MMU_TTPage4k() argument
2904 offset = base_address >> 20; in MMU_TTPage4k()
2912 offset2 = (base_address & 0xff000) >> 12; in MMU_TTPage4k()
2914 entry2 = (base_address & 0xFFFFF000) | descriptor_l2; in MMU_TTPage4k()
2933 __STATIC_INLINE void MMU_TTPage64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t d… in MMU_TTPage64k() argument
2940 offset = base_address >> 20; in MMU_TTPage64k()
2948 offset2 = (base_address & 0xff000) >> 12; in MMU_TTPage64k()
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