RCC_PLL1CFGR_PLL1RGE_Pos (reference) in projects: trusted-firmware-m-3.7.0

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Searched refs:RCC_PLL1CFGR_PLL1RGE_Pos (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Source/Templates/
D	system_stm32h5xx.c	`297 …ODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RGE, RCC_PLL1CFGR_PLL1SRC_1 << RCC_PLL1CFGR_PLL1RGE_Pos); in SetSysClock()`
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/secure/
D	tfm_hal_isolation.c	`319 …ODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RGE, RCC_PLL1CFGR_PLL1SRC_1 << RCC_PLL1CFGR_PLL1RGE_Pos); in SetSysClock()`
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/Device/Include/
D	stm32u585xx.h	`15423 #define RCC_PLL1CFGR_PLL1RGE_Pos (2U) macro 15424 #define RCC_PLL1CFGR_PLL1RGE_Msk (0x3UL << RCC_PLL1CFGR_PLL1RGE_Pos) /!< 0x0000000C… 15426 #define RCC_PLL1CFGR_PLL1RGE_0 (0x1UL << RCC_PLL1CFGR_PLL1RGE_Pos) /!< 0x00000004… 15427 #define RCC_PLL1CFGR_PLL1RGE_1 (0x2UL << RCC_PLL1CFGR_PLL1RGE_Pos) /*!< 0x00000008…`
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Include/
D	stm32h573xx.h	`15843 #define RCC_PLL1CFGR_PLL1RGE_Pos (2U) macro 15844 #define RCC_PLL1CFGR_PLL1RGE_Msk (0x3UL << RCC_PLL1CFGR_PLL1RGE_Pos) /!< 0x0000000C… 15846 #define RCC_PLL1CFGR_PLL1RGE_0 (0x1UL << RCC_PLL1CFGR_PLL1RGE_Pos) /!< 0x00000004… 15847 #define RCC_PLL1CFGR_PLL1RGE_1 (0x2UL << RCC_PLL1CFGR_PLL1RGE_Pos) /*!< 0x00000008…`

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TraceRecorderSource-3.4.0
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