1 /* 2 * Copyright (c) 2021 Nordic Semiconductor ASA 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #ifndef NRF_INCLUDE_NRF_PINCTRL_H 7 #define NRF_INCLUDE_NRF_PINCTRL_H 8 9 /* 10 * The whole nRF pin configuration information is encoded in a 32-bit bitfield 11 * organized as follows: 12 * 13 * - 31..16: Pin function. 14 * - 15: Reserved. 15 * - 14: Pin inversion mode. 16 * - 13: Pin low power mode. 17 * - 12..9: Pin output drive configuration. 18 * - 8..7: Pin pull configuration. 19 * - 6..0: Pin number (combination of port and pin). 20 */ 21 22 /** 23 * @name nRF pin configuration bit field positions and masks. 24 * @{ 25 */ 26 27 /** Position of the function field. */ 28 #define NRF_FUN_POS 16U 29 /** Mask for the function field. */ 30 #define NRF_FUN_MSK 0xFFFFU 31 /** Position of the invert field. */ 32 #define NRF_INVERT_POS 14U 33 /** Mask for the invert field. */ 34 #define NRF_INVERT_MSK 0x1U 35 /** Position of the low power field. */ 36 #define NRF_LP_POS 13U 37 /** Mask for the low power field. */ 38 #define NRF_LP_MSK 0x1U 39 /** Position of the drive configuration field. */ 40 #define NRF_DRIVE_POS 9U 41 /** Mask for the drive configuration field. */ 42 #define NRF_DRIVE_MSK 0xFU 43 /** Position of the pull configuration field. */ 44 #define NRF_PULL_POS 7U 45 /** Mask for the pull configuration field. */ 46 #define NRF_PULL_MSK 0x3U 47 /** Position of the pin field. */ 48 #define NRF_PIN_POS 0U 49 /** Mask for the pin field. */ 50 #define NRF_PIN_MSK 0x7FU 51 52 /** @} */ 53 54 /** 55 * @name nRF pinctrl pin functions. 56 * @{ 57 */ 58 59 /** UART TX */ 60 #define NRF_FUN_UART_TX 0U 61 /** UART RX */ 62 #define NRF_FUN_UART_RX 1U 63 /** UART RTS */ 64 #define NRF_FUN_UART_RTS 2U 65 /** UART CTS */ 66 #define NRF_FUN_UART_CTS 3U 67 68 /** Indicates that a pin is disconnected */ 69 #define NRF_PIN_DISCONNECTED NRF_PIN_MSK 70 71 /** @} */ 72 73 /** 74 * @brief Utility macro to build nRF psels property entry. 75 * 76 * @param fun Pin function configuration (see NRF_FUNC_{name} macros). 77 * @param port Port (0 or 1). 78 * @param pin Pin (0..31). 79 */ 80 #define NRF_PSEL(fun, port, pin) \ 81 ((((((port) * 32U) + (pin)) & NRF_PIN_MSK) << NRF_PIN_POS) | \ 82 ((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS)) 83 84 /** 85 * @brief Utility macro to build nRF psels property entry when a pin is disconnected. 86 * 87 * This can be useful in situations where code running before Zephyr, e.g. a bootloader 88 * configures pins that later needs to be disconnected. 89 * 90 * @param fun Pin function configuration (see NRF_FUN_{name} macros). 91 */ 92 #define NRF_PSEL_DISCONNECTED(fun) \ 93 (NRF_PIN_DISCONNECTED | \ 94 ((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS)) 95 96 /** 97 * @brief Utility macro to obtain pin function. 98 * 99 * @param pincfg Pin configuration bit field. 100 */ 101 #define NRF_GET_FUN(pincfg) (((pincfg) >> NRF_FUN_POS) & NRF_FUN_MSK) 102 103 104 /** 105 * @brief Utility macro to obtain port and pin combination. 106 * 107 * @param pincfg Pin configuration bit field. 108 */ 109 #define NRF_GET_PIN(pincfg) (((pincfg) >> NRF_PIN_POS) & NRF_PIN_MSK) 110 111 #endif /* NRF_INCLUDE_NRF_PINCTRL_H */ 112
