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Searched refs:CR3 (Results 1 – 23 of 23) sorted by relevance

/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/hal/Src/
Dstm32u5xx_hal_uart.c366 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_UART_Init()
431 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); in HAL_HalfDuplex_Init()
434 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); in HAL_HalfDuplex_Init()
517 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); in HAL_LIN_Init()
601 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_MultiProcessor_Init()
641 huart->Instance->CR3 = 0x0U; in HAL_UART_DeInit()
1324 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); in HAL_UART_Transmit_IT()
1498 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); in HAL_UART_Transmit_DMA()
1565 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && in HAL_UART_DMAPause()
1569 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); in HAL_UART_DMAPause()
[all …]
Dstm32u5xx_hal_uart_ex.c226 SET_BIT(huart->Instance->CR3, USART_CR3_DEM); in HAL_RS485Ex_Init()
229 MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); in HAL_RS485Ex_Init()
604 MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); in HAL_UARTEx_SetTxFifoThreshold()
653 MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); in HAL_UARTEx_SetRxFifoThreshold()
1096 …rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTC… in UARTEx_SetNbDataToProcess()
1097 …tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTC… in UARTEx_SetNbDataToProcess()
Dstm32u5xx_hal_pwr_ex.c388 CLEAR_BIT(PWR->CR3, PWR_CR3_REGSEL); in HAL_PWREx_ConfigSupply()
400 SET_BIT(PWR->CR3, PWR_CR3_REGSEL); in HAL_PWREx_ConfigSupply()
433 SET_BIT(PWR->CR3, PWR_CR3_FSTEN); in HAL_PWREx_EnableFastSoftStart()
442 CLEAR_BIT(PWR->CR3, PWR_CR3_FSTEN); in HAL_PWREx_DisableFastSoftStart()
Dstm32u5xx_hal_rtc_ex.c2041 SET_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper()
2045 … CLEAR_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper()
2063 …if ((uint32_t)(TAMP->CR3 & (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_P… in HAL_RTCEx_GetInternalTampers()
2103 SET_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper_IT()
2107 … CLEAR_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper_IT()
Dstm32u5xx_hal_rtc.c453 CLEAR_REG(TAMP->CR3); in HAL_RTC_DeInit()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32l5xx/hal/Src/
Dstm32l5xx_hal_uart.c360 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_UART_Init()
425 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); in HAL_HalfDuplex_Init()
428 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); in HAL_HalfDuplex_Init()
511 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); in HAL_LIN_Init()
595 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_MultiProcessor_Init()
635 huart->Instance->CR3 = 0x0U; in HAL_UART_DeInit()
1320 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); in HAL_UART_Transmit_IT()
1455 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); in HAL_UART_Transmit_DMA()
1522 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && in HAL_UART_DMAPause()
1526 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); in HAL_UART_DMAPause()
[all …]
Dstm32l5xx_hal_uart_ex.c226 SET_BIT(huart->Instance->CR3, USART_CR3_DEM); in HAL_RS485Ex_Init()
229 MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); in HAL_RS485Ex_Init()
444 MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); in HAL_UARTEx_StopModeWakeUpSourceConfig()
625 MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); in HAL_UARTEx_SetTxFifoThreshold()
674 MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); in HAL_UARTEx_SetRxFifoThreshold()
992 …rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTC… in UARTEx_SetNbDataToProcess()
993 …tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTC… in UARTEx_SetNbDataToProcess()
Dstm32l5xx_hal_pwr_ex.c519 SET_BIT(PWR->CR3, PWR_CR3_APC); in HAL_PWREx_EnablePullUpPullDownConfig()
531 CLEAR_BIT(PWR->CR3, PWR_CR3_APC); in HAL_PWREx_DisablePullUpPullDownConfig()
550 MODIFY_REG(PWR->CR3, PWR_CR3_RRS, SRAM2ContentRetention); in HAL_PWREx_ConfigSRAM2ContentRetention()
1172 SET_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); in HAL_PWREx_EnableUCPDStandbyMode()
1186 CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); in HAL_PWREx_DisableUCPDStandbyMode()
1198 CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); in HAL_PWREx_EnableUCPDDeadBattery()
1215 SET_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); in HAL_PWREx_DisableUCPDDeadBattery()
1227 SET_BIT(PWR->CR3, PWR_CR3_ULPMEN); in HAL_PWREx_EnableUltraLowPowerMode()
1238 CLEAR_BIT(PWR->CR3, PWR_CR3_ULPMEN); in HAL_PWREx_DisableUltraLowPowerMode()
Dstm32l5xx_hal_pwr.c401 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity)); in HAL_PWR_EnableWakeUpPin()
417 CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx)); in HAL_PWR_DisableWakeUpPin()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/hal/Src/
Dstm32h5xx_hal_uart.c366 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_UART_Init()
431 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); in HAL_HalfDuplex_Init()
434 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); in HAL_HalfDuplex_Init()
517 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); in HAL_LIN_Init()
601 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_MultiProcessor_Init()
641 huart->Instance->CR3 = 0x0U; in HAL_UART_DeInit()
1137 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) in HAL_UART_Transmit()
1139 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); in HAL_UART_Transmit()
1229 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) in HAL_UART_Receive()
1231 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); in HAL_UART_Receive()
[all …]
Dstm32h5xx_hal_uart_ex.c226 SET_BIT(huart->Instance->CR3, USART_CR3_DEM); in HAL_RS485Ex_Init()
229 MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); in HAL_RS485Ex_Init()
444 MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); in HAL_UARTEx_StopModeWakeUpSourceConfig()
625 MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); in HAL_UARTEx_SetTxFifoThreshold()
674 MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); in HAL_UARTEx_SetRxFifoThreshold()
1023 …rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTC… in UARTEx_SetNbDataToProcess()
1024 …tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTC… in UARTEx_SetNbDataToProcess()
Dstm32h5xx_hal_rtc_ex.c2121 SET_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper()
2125 … CLEAR_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper()
2169 SET_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper_IT()
2173 … CLEAR_BIT(TAMP->CR3, (sIntTamper->IntTamper >> (TAMP_CR1_ITAMP1E_Pos - TAMP_CR3_ITAMP1NOER_Pos))); in HAL_RTCEx_SetInternalTamper_IT()
Dstm32h5xx_hal_rtc.c497 CLEAR_REG(TAMP->CR3); in HAL_RTC_DeInit()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/hal/Inc/
Dstm32u5xx_hal_uart.h956 ((__HANDLE__)->Instance->CR3 |= (1U <<\
988 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
1042 … (__HANDLE__)->Instance->CR3)) & (1U <<\
1083 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBI…
1089 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ON…
1118 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1137 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1156 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1175 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32l5xx/hal/Inc/
Dstm32l5xx_hal_uart.h957 … ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
985 … ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
1038 …(__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ?…
1078 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBI…
1084 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ON…
1112 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1130 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1148 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1166 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
Dstm32l5xx_hal_usart.h562 ((__HANDLE__)->Instance->CR3 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
587 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
637 … (__HANDLE__)->Instance->CR3)) & (0x01U <<\
673 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEB…
679 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_O…
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/hal/Inc/
Dstm32h5xx_hal_uart.h1000 ((__HANDLE__)->Instance->CR3 |= (1U <<\
1033 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
1089 … (__HANDLE__)->Instance->CR3)) & (1U <<\
1131 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBI…
1137 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ON…
1166 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1185 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1204 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1223 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/bl2/
Dlow_level_security.c1890 (READ_REG(TAMP->CR3) != 0x00000000U)) in active_tamper()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/bl2/
Dlow_level_security.c2001 (READ_REG(TAMP->CR3) != 0x00000000U)) in active_tamper()
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32l5xx/Device/Include/
Dstm32l552xx.h851 __IO uint32_t CR3; /*!< PWR power control register 3, Address offset: 0x08 */ member
1010 __IO uint32_t CR3; /*!< TAMP configuration register 3, Address offset: 0x08 */ member
1224 …__IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 … member
Dstm32l562xx.h925 __IO uint32_t CR3; /*!< PWR power control register 3, Address offset: 0x08 */ member
1084 __IO uint32_t CR3; /*!< TAMP configuration register 3, Address offset: 0x08 */ member
1298 …__IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 … member
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/Device/Include/
Dstm32u585xx.h947 …__IO uint32_t CR3; /*!< Power control register 3, Address offset: 0x… member
1134 …__IO uint32_t CR3; /*!< TAMP configuration register 3, Address offset: 0x0… member
1193 __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ member
/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Include/
Dstm32h573xx.h1280 __IO uint32_t CR3; /*!< TAMP control register 3, Address offset: 0x08 */ member
1340 __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ member