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Searched refs:APB1LRSTR (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/hal/Inc/
Dstm32h5xx_hal_rcc.h3035 WRITE_REG(RCC->APB1LRSTR, 0xDFFEC1FFU); \
3039 #define __HAL_RCC_TIM2_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM2RST)
3041 #define __HAL_RCC_TIM3_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM3RST)
3044 #define __HAL_RCC_TIM4_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM4RST)
3048 #define __HAL_RCC_TIM5_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM5RST)
3051 #define __HAL_RCC_TIM6_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM6RST)
3053 #define __HAL_RCC_TIM7_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM7RST)
3056 #define __HAL_RCC_TIM12_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM12RST)
3060 #define __HAL_RCC_TIM13_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM13RST)
3064 #define __HAL_RCC_TIM14_FORCE_RESET() SET_BIT(RCC->APB1LRSTR, RCC_APB1LRSTR_TIM14RST)
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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Include/
Dstm32h573xx.h1182 …__IO uint32_t APB1LRSTR; /*!< RCC APB1 Peripherals reset Low Word register … member