| /Zephyr-latest/arch/arm64/core/ |
| D | early_mem_funcs.S | 30 cmp x2, #8
39 sub x2, x2, #8
40 cmp x2, #7
45 cbz x2, 4f
48 subs x2, x2, #1
64 cmp x2, #8
69 sub x2, x2, #8
70 cmp x2, #7
75 cbz x2, 4f
79 subs x2, x2, #1
|
| D | switch.S | 57 lsr x2, x4, #TPIDRROEL0_EXC_SHIFT
63 orr x4, x4, x2, lsl #TPIDRROEL0_EXC_SHIFT
84 ldr x2, [x0, #_thread_offset_to_tls]
90 msr tpidr_el0, x2
114 ldr x2, [x0, #_thread_offset_to_stack_limit]
115 str x2, [x4, #_cpu_offset_to_current_stack_limit]
183 get_cpu x2
184 ldr w3, [x2, #___cpu_t_nested_OFFSET]
186 str w4, [x2, #___cpu_t_nested_OFFSET]
190 ldr x3, [x2, #___cpu_t_irq_stack_OFFSET]
[all …]
|
| D | reset.S | 139 get_cpu_logic_id x1, x2, x3, x4 //x1: MPID, x2: logic id
145 strb w5, [x4, x2]
151 strb wzr, [x4, x2]
156 strb wzr, [x4, x2]
180 ldr x2, [x0, #BOOT_PARAM_MPID_OFFSET]
181 cmp x1, x2
|
| D | isr_wrapper.S | 44 mov x2, sp
46 str x2, [sp, #-16]!
132 ldr x2, [x1, #_thread_offset_to_stack_limit]
133 str x2, [x0, #_cpu_offset_to_current_stack_limit]
|
| D | thread.c | 109 pInitCtx->x2 = (uint64_t)p2; in arch_new_thread()
174 register void *x2 __asm__("x2") = p2; in arch_user_mode_enter()
191 : "r" (x0), "r" (x1), "r" (x2), "r" (x3), in arch_user_mode_enter()
|
| D | coredump.c | 23 uint64_t x2; member
76 arch_blk.r.x2 = esf->x2; in arch_coredump_info_dump()
|
| D | fpu.S | 34 mrs x2, fpcr
63 msr fpcr, x2
|
| D | vector_table.S | 58 stp x2, x3, [sp, ___esf_t_x2_x3_OFFSET]
319 orr x2, x0, #TPIDRROEL0_IN_EL0
320 csel x0, x2, x0, eq
332 ldp x2, x3, [sp, ___esf_t_x2_x3_OFFSET]
|
| /Zephyr-latest/tests/drivers/gpio/gpio_reserved_ranges/boards/ |
| D | native_posix.overlay | 18 #gpio-cells = < 0x2 >;
30 #gpio-cells = < 0x2 >;
40 #gpio-cells = < 0x2 >;
51 #gpio-cells = < 0x2 >;
62 #gpio-cells = < 0x2 >;
73 #gpio-cells = < 0x2 >;
|
| /Zephyr-latest/tests/drivers/stepper/drv8424/emul/boards/ |
| D | native_sim.overlay | 29 #gpio-cells = <0x2>;
36 #gpio-cells = <0x2>;
43 #gpio-cells = <0x2>;
|
| /Zephyr-latest/tests/drivers/stepper/drv8424/api/boards/ |
| D | native_sim.overlay | 29 #gpio-cells = <0x2>;
36 #gpio-cells = <0x2>;
43 #gpio-cells = <0x2>;
|
| /Zephyr-latest/dts/arm/nuvoton/npcx/ |
| D | npcx-alts-map.dtsi | 29 alts = <&scfg 0x01 0x2 0>;
55 alts = <&scfg 0x02 0x2 0>;
78 alts = <&scfg 0x03 0x2 0>;
98 alts = <&scfg 0x04 0x2 0>;
132 alts = <&scfg 0x06 0x2 0>;
158 alts = <&scfg 0x07 0x2 1>;
184 alts = <&scfg 0x08 0x2 1>;
210 alts = <&scfg 0x09 0x2 1>;
236 alts = <&scfg 0x0A 0x2 0>;
253 alts = <&scfg 0x0B 0x2 0>;
[all …]
|
| /Zephyr-latest/dts/arm/ |
| D | cortex_r8_virt.dtsi | 47 interrupts = < 0x0 0x24 0x2 0xa0 >,
48 < 0x0 0x25 0x2 0xa0 >,
49 < 0x0 0x26 0x2 0xa0 >;
|
| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx4/ |
| D | npcx4-alts-map.dtsi | 59 alts = <&scfg 0x0C 0x2 1>;
107 alts = <&scfg 0x12 0x2 0>;
138 alts = <&scfg 0x14 0x2 0>;
164 alts = <&scfg 0x15 0x2 0>;
181 alts = <&scfg 0x16 0x2 0>;
|
| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx7/ |
| D | npcx7-alts-map.dtsi | 20 alts = <&scfg 0x05 0x2 1>;
49 alts = <&scfg 0x0E 0x2 0>;
|
| /Zephyr-latest/tests/drivers/build_all/sensor/ |
| D | i3c.dtsi | 22 reg = <0x2 0x00000803 0xE0000002>;
23 assigned-address = <0x2>;
|
| /Zephyr-latest/tests/drivers/build_all/rtc/ |
| D | i2c_devices.overlay | 15 #gpio-cells = <0x2>;
46 reg = <0x2>;
|
| /Zephyr-latest/modules/lvgl/ |
| D | lvgl_display_mono.c | 75 uint16_t w = area->x2 - area->x1 + 1; in lvgl_flush_cb_mono()
128 area->x2 = data->cap.x_resolution - 1; in lvgl_rounder_cb_mono()
131 area->x2 |= 0x7; in lvgl_rounder_cb_mono()
|
| /Zephyr-latest/tests/drivers/build_all/ethernet/ |
| D | app.overlay | 15 #gpio-cells = <0x2>;
45 reg = <0x2>;
|
| D | spi_devices.overlay | 22 #gpio-cells = <0x2>;
62 reg = <0x2>;
119 reg = <0x2>;
|
| /Zephyr-latest/tests/drivers/build_all/gpio/ |
| D | efinix_sapphire.overlay | 16 #gpio-cells = <0x2>;
|
| /Zephyr-latest/samples/subsys/tracing/ |
| D | gpio.overlay | 16 #gpio-cells = < 0x2 >;
|
| /Zephyr-latest/drivers/sensor/infineon/dps310/ |
| D | Kconfig | 27 bool "x2"
51 bool "x2"
|
| /Zephyr-latest/tests/drivers/build_all/w1/ |
| D | app.overlay | 22 #gpio-cells = <0x2>;
72 reg = <0x2>;
|
| /Zephyr-latest/tests/drivers/build_all/ieee802154/boards/ |
| D | native_sim.overlay | 17 #gpio-cells = <0x2>;
63 reg = <0x2>;
|
