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Searched refs:irq_num (Results 1 – 25 of 38) sorted by relevance

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/Zephyr-latest/arch/arc/core/
Darc_connect.c317 void z_arc_connect_idu_set_mode(uint32_t irq_num, in z_arc_connect_idu_set_mode() argument
322 irq_num, (distri_mode | (trigger_mode << 4))); in z_arc_connect_idu_set_mode()
327 uint32_t z_arc_connect_idu_read_mode(uint32_t irq_num) in z_arc_connect_idu_read_mode() argument
332 z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MODE, irq_num); in z_arc_connect_idu_read_mode()
343 void z_arc_connect_idu_set_dest(uint32_t irq_num, uint32_t core_mask) in z_arc_connect_idu_set_dest() argument
347 irq_num, core_mask); in z_arc_connect_idu_set_dest()
352 uint32_t z_arc_connect_idu_read_dest(uint32_t irq_num) in z_arc_connect_idu_read_dest() argument
357 z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_DEST, irq_num); in z_arc_connect_idu_read_dest()
365 void z_arc_connect_idu_gen_cirq(uint32_t irq_num) in z_arc_connect_idu_gen_cirq() argument
368 z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_GEN_CIRQ, irq_num); in z_arc_connect_idu_gen_cirq()
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/Zephyr-latest/include/zephyr/arch/arc/v2/
Darc_connect.h222 extern void z_arc_connect_idu_set_mode(uint32_t irq_num,
224 extern uint32_t z_arc_connect_idu_read_mode(uint32_t irq_num);
225 extern void z_arc_connect_idu_set_dest(uint32_t irq_num, uint32_t core_mask);
226 extern uint32_t z_arc_connect_idu_read_dest(uint32_t irq_num);
227 extern void z_arc_connect_idu_gen_cirq(uint32_t irq_num);
228 extern void z_arc_connect_idu_ack_cirq(uint32_t irq_num);
229 extern uint32_t z_arc_connect_idu_check_status(uint32_t irq_num);
230 extern uint32_t z_arc_connect_idu_check_source(uint32_t irq_num);
231 extern void z_arc_connect_idu_set_mask(uint32_t irq_num, uint32_t mask);
232 extern uint32_t z_arc_connect_idu_read_mask(uint32_t irq_num);
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/Zephyr-latest/drivers/gpio/
Dgpio_eos_s3.c279 int irq_num = gpio_eos_s3_get_irq_num(pad_config.ucPin); in gpio_eos_s3_pin_interrupt_configure() local
281 if (irq_num < 0) { in gpio_eos_s3_pin_interrupt_configure()
286 INTR_CTRL->GPIO_INTR_EN_M4 &= ~BIT((uint32_t)irq_num); in gpio_eos_s3_pin_interrupt_configure()
289 data->gpio_irqs[irq_num] = DISABLED_GPIO_IRQ; in gpio_eos_s3_pin_interrupt_configure()
292 INTR_CTRL->GPIO_INTR_TYPE &= ~((uint32_t)(BIT(irq_num))); in gpio_eos_s3_pin_interrupt_configure()
293 INTR_CTRL->GPIO_INTR_POL &= ~((uint32_t)(BIT(irq_num))); in gpio_eos_s3_pin_interrupt_configure()
320 int irq_num = HAL_GPIO_IntrCfg(&gpio_cfg); in gpio_eos_s3_pin_interrupt_configure() local
322 if (irq_num < 0) { in gpio_eos_s3_pin_interrupt_configure()
327 data->gpio_irqs[irq_num] = gpio_num; in gpio_eos_s3_pin_interrupt_configure()
330 INTR_CTRL->GPIO_INTR |= BIT((uint32_t)irq_num); in gpio_eos_s3_pin_interrupt_configure()
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Dgpio_b91.c24 #define GET_IRQ_NUM(dev) (((const struct gpio_b91_config *)dev->config)->irq_num)
82 uint32_t irq_num; member
167 uint8_t irq_num = GET_IRQ_NUM(dev); in gpio_b91_irq_set() local
172 if (irq_num == IRQ_GPIO) { in gpio_b91_irq_set()
175 } else if (irq_num == IRQ_GPIO2_RISC0) { in gpio_b91_irq_set()
178 } else if (irq_num == IRQ_GPIO2_RISC1) { in gpio_b91_irq_set()
206 if (irq_num == IRQ_GPIO) { in gpio_b91_irq_set()
209 gpio_b91_irq_status_clr(irq_num); in gpio_b91_irq_set()
216 riscv_plic_irq_enable(irq_num); in gpio_b91_irq_set()
217 riscv_plic_set_priority(irq_num, irq_prioriy); in gpio_b91_irq_set()
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Dgpio_ambiq.c25 uint32_t irq_num; member
395 am_hal_gpio_interrupt_irq_status_get(dev_cfg->irq_num, false, &int_status); in ambiq_gpio_isr()
396 am_hal_gpio_interrupt_irq_clear(dev_cfg->irq_num, int_status); in ambiq_gpio_isr()
446 irq_enable(dev_cfg->irq_num); in ambiq_gpio_pin_interrupt_configure()
468 ret = am_hal_gpio_interrupt_irq_status_get(dev_cfg->irq_num, false, &int_status); in ambiq_gpio_pin_interrupt_configure()
469 ret = am_hal_gpio_interrupt_irq_clear(dev_cfg->irq_num, int_status); in ambiq_gpio_pin_interrupt_configure()
497 irq_enable(dev_cfg->irq_num); in ambiq_gpio_pin_interrupt_configure()
501 ret = am_hal_gpio_interrupt_irq_status_get(dev_cfg->irq_num, false, &int_status); in ambiq_gpio_pin_interrupt_configure()
502 ret = am_hal_gpio_interrupt_irq_clear(dev_cfg->irq_num, int_status); in ambiq_gpio_pin_interrupt_configure()
543 NVIC_ClearPendingIRQ(dev_cfg->irq_num); in ambiq_gpio_init()
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Dgpio_dw.h24 uint32_t irq_num; /* set to 0 if GPIO port cannot interrupt */ member
Dgpio_renesas_rz.c429 #define GPIO_RZ_TINT_ISR_DECLARE(irq_num, node_id) \ argument
430 static void rz_gpio_isr_##irq_num(void *param) \
432 gpio_rz_tint_isr(DT_IRQ_BY_IDX(node_id, irq_num, irq), param); \
435 #define GPIO_RZ_TINT_ISR_INIT(node_id, irq_num) LISTIFY(irq_num, \ argument
438 #define GPIO_RZ_TINT_CONNECT(irq_num, node_id) \ argument
439 IRQ_CONNECT(DT_IRQ_BY_IDX(node_id, irq_num, irq), \
440 DT_IRQ_BY_IDX(node_id, irq_num, priority), rz_gpio_isr_##irq_num, \
Dgpio_altera_pio.c25 uint32_t irq_num; member
231 irq_disable(cfg->irq_num); in gpio_altera_pin_interrupt_configure()
237 irq_enable(cfg->irq_num); in gpio_altera_pin_interrupt_configure()
308 .irq_num = COND_CODE_1(DT_INST_IRQ_HAS_IDX(n, 0), (DT_INST_IRQN(n)), (0)),\
Dgpio_andes_atcgpio100.c85 uint32_t irq_num; member
350 irq_enable(dev_cfg->irq_num); in gpio_atcgpio100_init()
366 .irq_num = DT_INST_IRQN(n), \
/Zephyr-latest/drivers/interrupt_controller/
Dintc_shared_irq.c25 uint32_t irq_num; member
78 irq_enable(config->irq_num); in enable()
112 irq_disable(config->irq_num); in disable()
128 clients->client[i].isr_func(clients->client[i].isr_dev, config->irq_num); in shared_irq_isr()
177 .irq_num = DT_INST_IRQN(n), \
Dintc_cavs.h19 uint32_t irq_num; member
/Zephyr-latest/arch/arc/include/
Dkernel_arch_func.h54 uint32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE); in Z_INTERRUPT_CAUSE() local
56 return irq_num; in Z_INTERRUPT_CAUSE()
/Zephyr-latest/drivers/watchdog/
Dwdt_ambiq.c22 uint32_t irq_num; member
160 NVIC_ClearPendingIRQ(dev_cfg->irq_num); in wdt_ambiq_init()
164 irq_enable(dev_cfg->irq_num); in wdt_ambiq_init()
187 .irq_num = DT_INST_IRQN(n), \
/Zephyr-latest/drivers/timer/
Dite_it8xxx2_timer.c327 uint32_t irq_num, in timer_init() argument
365 ite_intc_irq_polarity_set(irq_num, irq_flag); in timer_init()
368 ite_intc_isr_clear(irq_num); in timer_init()
385 irq_enable(irq_num); in timer_init()
387 irq_disable(irq_num); in timer_init()
/Zephyr-latest/include/zephyr/drivers/pcie/endpoint/
Dpcie_ep.h70 uint32_t irq_num);
189 uint32_t irq_num) in pcie_ep_raise_irq() argument
193 return api->raise_irq(dev, irq_type, irq_num); in pcie_ep_raise_irq()
/Zephyr-latest/drivers/ipm/
Dipm_sedi.h31 int32_t irq_num; member
Dipm_sedi.c248 irq_enable(info->irq_num); in ipm_sedi_set_enable()
250 irq_disable(info->irq_num); in ipm_sedi_set_enable()
277 .irq_num = DT_INST_IRQN(n), \
/Zephyr-latest/drivers/rtc/
Drtc_sam.c39 uint16_t irq_num; member
371 irq_disable(config->irq_num); in rtc_sam_alarm_set_time()
383 irq_enable(config->irq_num); in rtc_sam_alarm_set_time()
452 irq_disable(config->irq_num); in rtc_sam_alarm_set_callback()
462 irq_enable(config->irq_num); in rtc_sam_alarm_set_callback()
478 irq_disable(config->irq_num); in rtc_sam_update_set_callback()
489 irq_enable(config->irq_num); in rtc_sam_update_set_callback()
658 irq_enable(config->irq_num); in rtc_sam_init()
671 .irq_num = DT_INST_IRQN(id), \
/Zephyr-latest/drivers/peci/
Dpeci_mchp_xec.c48 uint8_t irq_num; member
190 NVIC_ClearPendingIRQ(cfg->irq_num); in peci_xec_disable()
191 irq_disable(cfg->irq_num); in peci_xec_disable()
208 irq_enable(cfg->irq_num); in peci_xec_enable()
556 IRQ_CONNECT(cfg->irq_num, in peci_xec_init()
569 .irq_num = DT_INST_IRQN(0),
/Zephyr-latest/drivers/ethernet/
Deth_stellaris_priv.h66 uint32_t irq_num; member
/Zephyr-latest/drivers/adc/
Dadc_gd32.c140 uint8_t irq_num; member
423 if ((cfg_##n->irq_num == active_irq) && \
432 LOG_DBG("global irq handler: %u", cfg->irq_num); in adc_gd32_global_irq_handler()
434 DT_INST_FOREACH_STATUS_OKAY_VARGS(HANDLE_SHARED_IRQ, (cfg->irq_num)); in adc_gd32_global_irq_handler()
497 .irq_num = DT_INST_IRQN(n), \
Dadc_xmc4xxx.c38 uint8_t irq_num; member
292 service_request = (config->irq_num - VADC_IRQ_MIN) % IRQS_PER_VADC_GROUP; in adc_xmc4xxx_init()
324 .irq_num = DT_INST_IRQN(index), \
/Zephyr-latest/drivers/i2c/
Di2c_ifx_xmc4.c444 uint8_t irq_num = DT_INST_IRQN(index); \
445 uint8_t service_request = (irq_num - USIC_IRQ_MIN) % IRQS_PER_USIC; \
457 irq_enable(irq_num); \
/Zephyr-latest/drivers/spi/
Dspi_xmc4xxx.c638 uint8_t irq_num; \
640 irq_num = DT_INST_IRQ_BY_NAME(index, rx, irq); \
641 service_request = (irq_num - USIC_IRQ_MIN) % IRQS_PER_USIC; \
656 irq_enable(irq_num); \
/Zephyr-latest/drivers/pcie/endpoint/
Dpcie_ep_iproc.c134 uint32_t irq_num) in iproc_pcie_raise_irq() argument
144 ret = iproc_pcie_generate_msi(dev, irq_num); in iproc_pcie_raise_irq()
147 ret = iproc_pcie_generate_msix(dev, irq_num); in iproc_pcie_raise_irq()

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