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/trusted-firmware-m-3.5.0/platform/ext/target/stm/common/stm32l5xx/hal/Src/
Dstm32l5xx_hal_exti.c146 uint32_t offset; in HAL_EXTI_SetConfigLine() local
162 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); in HAL_EXTI_SetConfigLine()
172 regaddr = (&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
189 regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
219 regaddr = (&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
236 regaddr = (&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
268 uint32_t offset; in HAL_EXTI_GetConfigLine() local
283 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); in HAL_EXTI_GetConfigLine()
288 regaddr = (&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_GetConfigLine()
302 regaddr = (&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_GetConfigLine()
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/trusted-firmware-m-3.5.0/lib/ext/cryptocell-312-runtime/host/src/tests/proj/cc3x/
Dtest_proj.h23 #define TEST_READ_TEE_CC_REG(offset) \ argument
24 *(volatile uint32_t *)(processMap.processTeeHwRegBaseAddr + (offset))
26 #define TEST_WRITE_TEE_CC_REG(offset, val) { \ argument
28 (*(volatile uint32_t *)(processMap.processTeeHwRegBaseAddr + (offset))) = (uint32_t)(val); \
32 #define TEST_READ_TEE_ENV_REG(offset) \ argument
33 *(volatile uint32_t *)(processMap.processTeeHwEnvBaseAddr + (offset))
35 #define TEST_WRITE_TEE_ENV_REG(offset, val) { \ argument
37 (*(volatile uint32_t *)(processMap.processTeeHwEnvBaseAddr + (offset))) = (uint32_t)(val); \
/trusted-firmware-m-3.5.0/lib/ext/cryptocell-312-runtime/host/src/tests/common/
Dtests_hw_access.h129 #define READ_REG(offset) \ argument
130 *(volatile uint32_t *)(g_testHwRegBaseAddr + (offset))
132 #define WRITE_REG(offset, val) { \ argument
134 (*(volatile uint32_t *)(g_testHwRegBaseAddr + (offset))) = (uint32_t)(val); \
139 #define READ_REE_REG(offset) \ argument
140 (*(volatile uint32_t *)(g_testHwReeRegBaseAddr + (offset)));
142 #define WRITE_REE_REG(offset, val) { \ argument
144 (*(volatile uint32_t *)(g_testHwReeRegBaseAddr + (offset))) = (uint32_t)(val); \
157 #define WRITE_ENV(offset, val) { \ argument
159 (*(volatile uint32_t *)(g_testHwEnvBaseAddr + (offset))) = (uint32_t)(val); \
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Dtests_hw_access_iot.h89 #define READ_REG(offset) \ argument
90 *(volatile uint32_t *)(g_testHwRegBaseAddr + (offset))
92 #define WRITE_REG(offset, val) { \ argument
94 (*(volatile uint32_t *)(g_testHwRegBaseAddr + (offset))) = (uint32_t)(val); \
98 #define WRITE_REG_OTP(offset, val) { \ argument
100 …(*(volatile uint32_t *)(g_testHwRegBaseAddr + CC_OTP_BASE_ADDR +(offset*sizeof(uint32_t)))) = (uin…
104 #define READ_REG_OTP(offset) \ argument
105 *(volatile uint32_t *)(g_testHwRegBaseAddr + CC_OTP_BASE_ADDR+ (offset))
107 #define WRITE_ENV(offset, val) { \ argument
109 (*(volatile uint32_t *)(g_testHwEnvBaseAddr + (offset))) = (uint32_t)(val); \
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/trusted-firmware-m-3.5.0/secure_fw/partitions/internal_trusted_storage/flash/
Dits_flash_nand.c31 uint32_t block_id, size_t offset) in get_phys_address() argument
33 return cfg->flash_area_addr + (block_id * cfg->block_size) + offset; in get_phys_address()
56 size_t offset, size_t size) in its_flash_nand_read() argument
76 (void)memcpy(buff, flash_dev->write_buf_0 + offset, size); in its_flash_nand_read()
78 (void)memcpy(buff, flash_dev->write_buf_1 + offset, size); in its_flash_nand_read()
80 addr = get_phys_address(cfg, block_id, offset); in its_flash_nand_read()
143 size_t offset, size_t size) in its_flash_nand_write() argument
156 (void)memcpy(flash_dev->write_buf_0 + offset, buff, size); in its_flash_nand_write()
158 (void)memcpy(flash_dev->write_buf_1 + offset, buff, size); in its_flash_nand_write()
161 (void)memcpy(flash_dev->write_buf_0 + offset, buff, size); in its_flash_nand_write()
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Dits_flash_nor.c31 uint32_t block_id, size_t offset) in get_phys_address() argument
33 return cfg->flash_area_addr + (block_id * cfg->block_size) + offset; in get_phys_address()
126 size_t offset, size_t size) in its_flash_nor_read() argument
133 addr = get_phys_address(cfg, block_id, offset); in its_flash_nor_read()
139 size_t offset, size_t size) in its_flash_nor_write() argument
150 addr = get_phys_address(cfg, block_id, offset); in its_flash_nor_write()
177 size_t offset; in its_flash_nor_erase() local
179 for (offset = 0; offset < cfg->block_size; offset += cfg->sector_size) { in its_flash_nor_erase()
180 addr = get_phys_address(cfg, block_id, offset); in its_flash_nor_erase()
Dits_flash_ram.c22 uint32_t block_id, size_t offset) in get_phys_address() argument
24 return (block_id * cfg->block_size) + offset; in get_phys_address()
36 size_t offset, size_t size) in its_flash_ram_read() argument
38 uint32_t idx = get_phys_address(cfg, block_id, offset); in its_flash_ram_read()
47 size_t offset, size_t size) in its_flash_ram_write() argument
49 uint32_t idx = get_phys_address(cfg, block_id, offset); in its_flash_ram_write()
/trusted-firmware-m-3.5.0/lib/ext/cryptocell-312-runtime/host/src/tests/integration_cc3x/runtime_integration_test/pal/include/
Drun_integration_pal_reg.h16 #define RUNIT_READ_REG(offset) \ argument
17 *(volatile uint32_t *)(processMap.processTeeHwRegBaseAddr + (offset))
20 #define RUNIT_WRITE_REG(offset, val) { \ argument
21 (*(volatile uint32_t *)(processMap.processTeeHwRegBaseAddr + (offset))) = (uint32_t)(val); \
/trusted-firmware-m-3.5.0/platform/ext/target/arm/corstone1000/ci_regression_tests/
DDriver_Flash_SRAM_Emu.c87 uint32_t offset) in is_range_valid() argument
93 if (offset > flash_limit) { in is_range_valid()
111 uint32_t offset) in is_sector_aligned() argument
115 if ((offset % flash_dev->data->sector_size) != 0) { in is_sector_aligned()
202 uint32_t offset = addr; in ARM_Flash_ReadData() local
209 rc = is_range_valid(TEST_FLASH_DEV, offset + cnt); in ARM_Flash_ReadData()
229 uint32_t offset = addr; in ARM_Flash_ProgramData() local
236 rc = is_range_valid(TEST_FLASH_DEV, offset + cnt); in ARM_Flash_ProgramData()
237 rc |= is_write_aligned(TEST_FLASH_DEV, offset); in ARM_Flash_ProgramData()
263 uint32_t offset = addr; in ARM_Flash_EraseSector() local
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/trusted-firmware-m-3.5.0/platform/ext/target/arm/mps3/corstone310/fvp/device/source/
Ddma350_address_remap.c27 {.begin = 0x00000000, .end = 0x00007FFF, .offset = 0x0A000000},
28 {.begin = 0x10000000, .end = 0x10007FFF, .offset = 0x0A000000},
29 {.begin = 0x20000000, .end = 0x20007FFF, .offset = 0x04000000},
30 {.begin = 0x30000000, .end = 0x30007FFF, .offset = 0x04000000}};
/trusted-firmware-m-3.5.0/platform/ext/target/nuvoton/common/bsp/StdDriver/src/
Dkeystore.c68 int32_t offset, i, cnt; in KS_Read() local
79 offset = 0; in KS_Read()
98 au32Key[offset + i] = KS->KEY[i]; in KS_Read()
104 offset += 8; in KS_Read()
191 int32_t offset, i, cnt; in KS_Write() local
214 offset = 0; in KS_Write()
224 KS->KEY[i] = au32Key[offset + i]; in KS_Write()
235 offset += 8; in KS_Write()
461 int32_t offset, i, cnt, sidx; in KS_WriteOTP() local
482 offset = 0; in KS_WriteOTP()
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/trusted-firmware-m-3.5.0/platform/ext/common/
Dboot_hal_bl1.c251 uintptr_t tlv_end, offset; in boot_add_data_to_shared_area() local
270 offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE; in boot_add_data_to_shared_area()
275 while (offset < tlv_end) { in boot_add_data_to_shared_area()
277 memcpy(&tlv_entry, (const void *)offset, SHARED_DATA_ENTRY_HEADER_SIZE); in boot_add_data_to_shared_area()
283 offset += SHARED_DATA_ENTRY_SIZE(tlv_entry.tlv_len); in boot_add_data_to_shared_area()
299 offset = tlv_end; in boot_add_data_to_shared_area()
300 memcpy((void *)offset, &tlv_entry, SHARED_DATA_ENTRY_HEADER_SIZE); in boot_add_data_to_shared_area()
302 offset += SHARED_DATA_ENTRY_HEADER_SIZE; in boot_add_data_to_shared_area()
303 memcpy((void *)offset, data, size); in boot_add_data_to_shared_area()
Dboot_hal_bl2.c256 uintptr_t tlv_end, offset; in boot_add_data_to_shared_area() local
275 offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE; in boot_add_data_to_shared_area()
280 while (offset < tlv_end) { in boot_add_data_to_shared_area()
282 memcpy(&tlv_entry, (const void *)offset, SHARED_DATA_ENTRY_HEADER_SIZE); in boot_add_data_to_shared_area()
288 offset += SHARED_DATA_ENTRY_SIZE(tlv_entry.tlv_len); in boot_add_data_to_shared_area()
304 offset = tlv_end; in boot_add_data_to_shared_area()
305 memcpy((void *)offset, &tlv_entry, SHARED_DATA_ENTRY_HEADER_SIZE); in boot_add_data_to_shared_area()
307 offset += SHARED_DATA_ENTRY_HEADER_SIZE; in boot_add_data_to_shared_area()
308 memcpy((void *)offset, data, size); in boot_add_data_to_shared_area()
/trusted-firmware-m-3.5.0/secure_fw/spm/ffm/
Dtfm_boot_data.c150 uintptr_t tlv_end, offset; in tfm_core_get_boot_data_handler() local
179 offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE; in tfm_core_get_boot_data_handler()
197 for (; offset < tlv_end; offset += next_tlv_offset) { in tfm_core_get_boot_data_handler()
199 (void)spm_memcpy(&tlv_entry, (const void *)offset, in tfm_core_get_boot_data_handler()
211 (void)spm_memcpy(ptr, (const void *)offset, next_tlv_offset); in tfm_core_get_boot_data_handler()
/trusted-firmware-m-3.5.0/platform/ext/target/arm/corstone1000/io/
Dio_flash.c70 uint32_t offset = addr - flash_dev_specs[flash_id]->base_addr; in flash_read() local
71 size_t rem = info->sector_count * info->sector_size - offset; in flash_read()
74 return flash_driver->ReadData(offset, buf, cnt); in flash_read()
84 uint32_t offset = addr - flash_dev_specs[flash_id]->base_addr; in flash_write() local
85 size_t rem = info->sector_count * info->sector_size - offset; in flash_write()
88 flash_driver->EraseSector(offset); in flash_write()
89 rc = flash_driver->ProgramData(offset, buf, cnt); in flash_write()
150 block_dev_spec[index].buffer.offset = flash_dev_specs[index]->buffer; in flash_dev_open()
Dio_block.c41 static int block_seek(io_entity_t *entity, int mode, size_t offset);
138 assert(((region->offset % cur->dev_spec->block_size) == 0) && in block_open()
141 cur->base = region->offset; in block_open()
150 static int block_seek(io_entity_t *entity, int mode, size_t offset) { in block_seek() argument
157 assert((offset >= 0) && ((uint32_t)offset < cur->size)); in block_seek()
160 cur->file_pos = (uint32_t)offset; in block_seek()
163 cur->file_pos += (uint32_t)offset; in block_seek()
311 request = ops->read(lba, buf->offset, request); in block_read()
331 memcpy((void *)(buffer + count), (void *)(buf->offset + skip), nbytes); in block_read()
433 request = ops->read(lba, buf->offset, request); in block_write()
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/trusted-firmware-m-3.5.0/secure_fw/partitions/internal_trusted_storage/flash_fs/
Dits_flash_fs.c29 size_t offset, in its_flash_fs_file_write_aligned_data() argument
35 if (!ITS_UTILS_IS_ALIGNED(offset, fs_ctx->cfg->program_unit)) { in its_flash_fs_file_write_aligned_data()
44 if (offset > file_meta->cur_size) { in its_flash_fs_file_write_aligned_data()
49 if (its_utils_check_contained_in(file_meta->max_size, offset, size) in its_flash_fs_file_write_aligned_data()
54 return its_flash_fs_dblock_write_file(fs_ctx, block_meta, file_meta, offset, in its_flash_fs_file_write_aligned_data()
222 size_t offset, in its_flash_fs_file_write() argument
311 &file_meta, offset, in its_flash_fs_file_write()
318 if (offset + data_size > file_meta.cur_size) { in its_flash_fs_file_write()
320 file_meta.cur_size = offset + data_size; in its_flash_fs_file_write()
558 size_t offset, in its_flash_fs_file_read() argument
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Dits_flash_fs.h100 uint32_t block_id, uint8_t *buf, size_t offset,
121 uint32_t block_id, const uint8_t *buf, size_t offset,
252 size_t offset,
269 size_t offset,
/trusted-firmware-m-3.5.0/platform/ext/target/arm/rss/common/bl2/
Dboot_dma.c42 {.begin = 0x00000000, .end = 0x00FFFFFF, .offset = 0x0A000000},
44 {.begin = 0x10000000, .end = 0x10FFFFFF, .offset = 0x0A000000},
46 {.begin = 0x20000000, .end = 0x20FFFFFF, .offset = 0x04000000},
48 {.begin = 0x30000000, .end = 0x30FFFFFF, .offset = 0x04000000}
/trusted-firmware-m-3.5.0/platform/ext/target/stm/common/scripts/
Dbin2hex.py61 offset = 0 variable
79 offset = int(a, base)
114 sys.exit(bin2hex(fin, fout, offset))
DTFM_BIN2HEX.sh43 python scripts/bin2hex.py --offset=$image_s $BINPATH/tfm_s_signed.bin $BINPATH/tfm_s_signed.hex
44 python scripts/bin2hex.py --offset=$image_ns $BINPATH/tfm_ns_signed.bin $BINPATH/tfm_ns_signed.hex
45 python scripts/bin2hex.py --offset=$bl2 $BINPATH/bl2.bin $BINPATH/bl2.hex
55 python scripts/bin2hex.py --offset=0x8000000 $BINPATH/clean.bin $BINPATH/clean.hex
/trusted-firmware-m-3.5.0/platform/ext/common/template/
Dflash_otp_nv_counters_backend.c28 enum tfm_plat_err_t read_otp_nv_counters_flash(uint32_t offset, void *data, uint32_t cnt) in read_otp_nv_counters_flash() argument
30 memcpy(data, ((void*)&otp_nv_ram_buf) + offset, cnt); in read_otp_nv_counters_flash()
57 enum tfm_plat_err_t write_otp_nv_counters_flash(uint32_t offset, const void *data, uint32_t cnt) in write_otp_nv_counters_flash() argument
59 memcpy(((void*)&otp_nv_ram_buf) + offset, data, cnt); in write_otp_nv_counters_flash()
127 enum tfm_plat_err_t read_otp_nv_counters_flash(uint32_t offset, void *data, uint32_t cnt) in read_otp_nv_counters_flash() argument
138 if (offset % data_width) { in read_otp_nv_counters_flash()
145 TFM_OTP_NV_COUNTERS_AREA_ADDR + offset, in read_otp_nv_counters_flash()
156 TFM_OTP_NV_COUNTERS_AREA_ADDR + offset + read_cnt, in read_otp_nv_counters_flash()
338 enum tfm_plat_err_t write_otp_nv_counters_flash(uint32_t offset, const void *data, uint32_t cnt) in write_otp_nv_counters_flash() argument
351 erase_start_offset = round_down(offset, TFM_OTP_NV_COUNTERS_SECTOR_SIZE); in write_otp_nv_counters_flash()
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/trusted-firmware-m-3.5.0/platform/ext/target/nxp/common/Native_Driver/drivers/
Dfsl_common.c16 uint16_t offset; /*!< offset from aligned address to real address */ member
60 p_cb->offset = (uint16_t)(p_align_addr.unsigned_value - p_addr.unsigned_value); in SDK_Malloc()
80 p_free.unsigned_value = p_free.unsigned_value - p_cb->offset; in SDK_Free()
/trusted-firmware-m-3.5.0/lib/ext/cryptocell-312-runtime/host/src/tests/proj/cc3x/cc312_r1/
Dtest_proj_otp.h60 #define TEST_WRITE_OTP_BY_REG(offset, val) \ argument
61 TEST_WRITE_TEE_CC_REG(CC_OTP_BASE_ADDR +(offset*sizeof(uint32_t)), val)
63 #define TEST_READ_OTP_BY_REG(offset) \ argument
64 TEST_READ_TEE_CC_REG(CC_OTP_BASE_ADDR+ (offset*sizeof(uint32_t)))
331 uint32_t Test_ProjSetSwVerInOtpBuff(uint32_t *otp, uint32_t offset, uint32_t max_size);
/trusted-firmware-m-3.5.0/secure_fw/partitions/protected_storage/
Dps_object_system.c176 uint32_t offset, uint32_t size, in ps_object_read() argument
204 if (offset > g_ps_object.header.info.current_size) { in ps_object_read()
210 g_ps_object.header.info.current_size - offset); in ps_object_read()
213 ps_req_mngr_write_asset_data(g_ps_object.data + offset, size); in ps_object_read()
346 uint32_t offset, uint32_t size) in ps_object_write() argument
385 if (offset > g_ps_object.header.info.current_size) { in ps_object_write()
392 offset, size); in ps_object_write()
398 err = ps_req_mngr_read_asset_data(g_ps_object.data + offset, size); in ps_object_write()
404 if ((offset + size) > g_ps_object.header.info.current_size) { in ps_object_write()
405 g_ps_object.header.info.current_size = offset + size; in ps_object_write()

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