Searched refs:INTENSET (Results 1 – 8 of 8) sorted by relevance
312 PMU->INTENSET = mask; in ARM_PMU_Set_CNTR_IRQ_Enable()
1481 …__IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable S… member
1976 …__IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable S… member
1881 …__IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable S… member
1123 base->INTENSET = USART_INTENSET_TXIDLEEN_MASK; in USART_TransferHandleIRQ()1129 …if ((0U != (base->INTENSET & USART_INTENSET_TXIDLEEN_MASK)) && (0U != (base->INTSTAT & USART_INTST… in USART_TransferHandleIRQ()
976 base->INTENSET = HASHCRYPT_INTENCLR_DIGEST_MASK | HASHCRYPT_INTENCLR_ERROR_MASK; in HASHCRYPT_SHA_UpdateNonBlocking()
5418 __IO uint32_t INTENSET; /**< Sets interrupts, offset: 0x10 */ member6707 …__IO uint32_t INTENSET; /**< Interrupt Enable read and Set for all DMA ch… member9986 …__IO uint32_t INTENSET; /**< Write 1 to enable interrupts; reads back wit… member10489 …__IO uint32_t INTENSET; /**< Interrupt Enable Set and read register., off… member19785 …__IO uint32_t INTENSET; /**< SPI Interrupt Enable read and Set. A complet… member24803 …__IO uint32_t INTENSET; /**< Interrupt Enable read and Set register for U… member
