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Searched refs:u32FIN (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/m2351/bsp/Library/StdDriver/src/
Dclk.c212 uint32_t u32PllReg, u32FIN, u32NF, u32NR, u32NO; in CLK_GetCPUFreq() local
229 u32FIN = __HIRC; /* PLL source clock from HIRC */ in CLK_GetCPUFreq()
233 u32FIN = __HXT; /* PLL source clock from HXT */ in CLK_GetCPUFreq()
239 PllClock = u32FIN; /* PLL is in bypass mode */ in CLK_GetCPUFreq()
249 PllClock = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2); in CLK_GetCPUFreq()
1076 uint32_t u32FIN, u32NF, u32NR, u32NO; in CLK_GetPLLClockFreq() local
1091 u32FIN = __HIRC; /* PLL source clock from HIRC */ in CLK_GetPLLClockFreq()
1095 u32FIN = __HXT; /* PLL source clock from HXT */ in CLK_GetPLLClockFreq()
1101 u32PllFreq = u32FIN; /* PLL is in bypass mode */ in CLK_GetPLLClockFreq()
1111 u32PllFreq = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2); in CLK_GetPLLClockFreq()
/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/m2354/bsp/Library/StdDriver/src/
Dclk.c222 uint32_t u32PllReg, u32FIN, u32NF, u32NR, u32NO; in CLK_GetCPUFreq() local
239 u32FIN = __HIRC; /* PLL source clock from HIRC */ in CLK_GetCPUFreq()
243 u32FIN = __HXT; /* PLL source clock from HXT */ in CLK_GetCPUFreq()
249 PllClock = u32FIN; /* PLL is in bypass mode */ in CLK_GetCPUFreq()
259 PllClock = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2); in CLK_GetCPUFreq()
1226 uint32_t u32FIN, u32NF, u32NR, u32NO; in CLK_GetPLLClockFreq() local
1240 u32FIN = __HIRC; /* PLL source clock from HIRC */ in CLK_GetPLLClockFreq()
1244 u32FIN = __HXT; /* PLL source clock from HXT */ in CLK_GetPLLClockFreq()
1250 u32PllFreq = u32FIN; /* PLL is in bypass mode */ in CLK_GetPLLClockFreq()
1260 u32PllFreq = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2); in CLK_GetPLLClockFreq()