1 /*
2 * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
3 * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon
4 * company) or an affiliate of Cypress Semiconductor Corporation. All rights
5 * reserved.
6 *
7 * SPDX-License-Identifier: BSD-3-Clause
8 *
9 */
10
11 #include <stdint.h>
12
13 #include "cmsis.h"
14 #include "spm_ipc.h"
15 #include "tfm_hal_interrupt.h"
16 #include "tfm_peripherals_def.h"
17 #include "tfm_peripherals_config.h"
18 #include "load/interrupt_defs.h"
19 #include "ffm/interrupt.h"
20
irq_init(struct irq_t * irq,IRQn_Type irqn,void * p_pt,const struct irq_load_info_t * p_ildi)21 static enum tfm_hal_status_t irq_init(struct irq_t *irq, IRQn_Type irqn,
22 void * p_pt,
23 const struct irq_load_info_t *p_ildi)
24 {
25 irq->p_ildi = p_ildi;
26 irq->p_pt = p_pt;
27
28 NVIC_SetPriority(irqn, DEFAULT_IRQ_PRIORITY);
29 NVIC_ClearTargetState(irqn);
30 NVIC_DisableIRQ(irqn);
31
32 return TFM_HAL_SUCCESS;
33 }
34
35 #if TFM_PERIPHERAL_FPU_SECURE
36 static struct irq_t fpu_irq = {0};
37
FPU_IRQHandler(void)38 void FPU_IRQHandler(void)
39 {
40 spm_handle_interrupt(fpu_irq.p_pt, fpu_irq.p_ildi);
41 }
42
tfm_fpu_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)43 enum tfm_hal_status_t tfm_fpu_irq_init(void *p_pt,
44 const struct irq_load_info_t *p_ildi)
45 {
46 return irq_init(&fpu_irq, TFM_FPU_IRQ, p_pt, p_ildi);
47 }
48 #endif
49
50 #if TFM_PERIPHERAL_CLOCK_SECURE || TFM_PERIPHERAL_POWER_SECURE
51 static struct irq_t clock_power_irq = {0};
52
CLOCK_POWER_IRQHandler(void)53 void CLOCK_POWER_IRQHandler(void)
54 {
55 spm_handle_interrupt(clock_power_irq.p_pt, clock_power_irq.p_ildi);
56 }
57
tfm_clock_power_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)58 enum tfm_hal_status_t tfm_clock_power_irq_init(void *p_pt,
59 const struct irq_load_info_t *p_ildi)
60 {
61 return irq_init(&clock_power_irq, TFM_CLOCK_POWER_IRQ, p_pt, p_ildi);
62 }
63
64 enum tfm_hal_status_t tfm_clock_irq_init(void *p_pt,
65 const struct irq_load_info_t *p_ildi)
66 __attribute__((alias("tfm_clock_power_irq_init")));
67
68 enum tfm_hal_status_t tfm_power_irq_init(void *p_pt,
69 const struct irq_load_info_t *p_ildi)
70 __attribute__((alias("tfm_clock_power_irq_init")));
71 #endif
72
73 #if TFM_PERIPHERAL_SPIM0_SECURE || TFM_PERIPHERAL_SPIS0_SECURE || \
74 TFM_PERIPHERAL_TWIM0_SECURE || TFM_PERIPHERAL_TWIS0_SECURE || \
75 TFM_PERIPHERAL_UARTE0_SECURE
76 static struct irq_t serial0_irq = {0};
77
SERIAL0_IRQHandler(void)78 void SERIAL0_IRQHandler(void)
79 {
80 spm_handle_interrupt(serial0_irq.p_pt, serial0_irq.p_ildi);
81 }
82
tfm_serial0_init(void * p_pt,const struct irq_load_info_t * p_ildi)83 enum tfm_hal_status_t tfm_serial0_init(void *p_pt,
84 const struct irq_load_info_t *p_ildi)
85 {
86 return irq_init(&serial0_irq, TFM_SERIAL0_IRQ, p_pt, p_ildi);
87 }
88
89 enum tfm_hal_status_t tfm_spim0_irq_init(void *p_pt,
90 const struct irq_load_info_t *p_ildi)
91 __attribute__((alias("tfm_serial0_init")));
92
93 enum tfm_hal_status_t tfm_spis0_irq_init(void *p_pt,
94 const struct irq_load_info_t *p_ildi)
95 __attribute__((alias("tfm_serial0_init")));
96
97 enum tfm_hal_status_t tfm_twim0_irq_init(void *p_pt,
98 const struct irq_load_info_t *p_ildi)
99 __attribute__((alias("tfm_serial0_init")));
100
101 enum tfm_hal_status_t tfm_twis0_irq_init(void *p_pt,
102 const struct irq_load_info_t *p_ildi)
103 __attribute__((alias("tfm_serial0_init")));
104
105 enum tfm_hal_status_t tfm_uarte0_irq_init(void *p_pt,
106 const struct irq_load_info_t *p_ildi)
107 __attribute__((alias("tfm_serial0_init")));
108 #endif
109
110 #if TFM_PERIPHERAL_SPIM1_SECURE || TFM_PERIPHERAL_SPIS1_SECURE || \
111 TFM_PERIPHERAL_TWIM1_SECURE || TFM_PERIPHERAL_TWIS1_SECURE || \
112 TFM_PERIPHERAL_UARTE1_SECURE
113 static struct irq_t serial1_irq = {0};
114
SERIAL1_IRQHandler(void)115 void SERIAL1_IRQHandler(void)
116 {
117 spm_handle_interrupt(serial1_irq.p_pt, serial1_irq.p_ildi);
118 }
119
tfm_serial1_init(void * p_pt,const struct irq_load_info_t * p_ildi)120 enum tfm_hal_status_t tfm_serial1_init(void *p_pt,
121 const struct irq_load_info_t *p_ildi)
122 {
123 return irq_init(&serial1_irq, TFM_SERIAL1_IRQ, p_pt, p_ildi);
124 }
125
126 enum tfm_hal_status_t tfm_spim1_irq_init(void *p_pt,
127 const struct irq_load_info_t *p_ildi)
128 __attribute__((alias("tfm_serial1_init")));
129
130 enum tfm_hal_status_t tfm_spis1_irq_init(void *p_pt,
131 const struct irq_load_info_t *p_ildi)
132 __attribute__((alias("tfm_serial1_init")));
133
134 enum tfm_hal_status_t tfm_twim1_irq_init(void *p_pt,
135 const struct irq_load_info_t *p_ildi)
136 __attribute__((alias("tfm_serial1_init")));
137
138 enum tfm_hal_status_t tfm_twis1_irq_init(void *p_pt,
139 const struct irq_load_info_t *p_ildi)
140 __attribute__((alias("tfm_serial1_init")));
141
142 enum tfm_hal_status_t tfm_uarte1_irq_init(void *p_pt,
143 const struct irq_load_info_t *p_ildi)
144 __attribute__((alias("tfm_serial1_init")));
145 #endif
146
147 #if TFM_PERIPHERAL_SPIM2_SECURE || TFM_PERIPHERAL_SPIS2_SECURE || \
148 TFM_PERIPHERAL_TWIM2_SECURE || TFM_PERIPHERAL_TWIS2_SECURE || \
149 TFM_PERIPHERAL_UARTE2_SECURE
150 static struct irq_t serial2_irq = {0};
151
SERIAL2_IRQHandler(void)152 void SERIAL2_IRQHandler(void)
153 {
154 spm_handle_interrupt(serial2_irq.p_pt, serial2_irq.p_ildi);
155 }
156
tfm_serial2_init(void * p_pt,const struct irq_load_info_t * p_ildi)157 enum tfm_hal_status_t tfm_serial2_init(void *p_pt,
158 const struct irq_load_info_t *p_ildi)
159 {
160 return irq_init(&serial2_irq, TFM_SERIAL2_IRQ, p_pt, p_ildi);
161 }
162
163 enum tfm_hal_status_t tfm_spim2_irq_init(void *p_pt,
164 const struct irq_load_info_t *p_ildi)
165 __attribute__((alias("tfm_serial2_init")));
166
167 enum tfm_hal_status_t tfm_spis2_irq_init(void *p_pt,
168 const struct irq_load_info_t *p_ildi)
169 __attribute__((alias("tfm_serial2_init")));
170
171 enum tfm_hal_status_t tfm_twim2_irq_init(void *p_pt,
172 const struct irq_load_info_t *p_ildi)
173 __attribute__((alias("tfm_serial2_init")));
174
175 enum tfm_hal_status_t tfm_twis2_irq_init(void *p_pt,
176 const struct irq_load_info_t *p_ildi)
177 __attribute__((alias("tfm_serial2_init")));
178
179 enum tfm_hal_status_t tfm_uarte2_irq_init(void *p_pt,
180 const struct irq_load_info_t *p_ildi)
181 __attribute__((alias("tfm_serial2_init")));
182 #endif
183
184 #if TFM_PERIPHERAL_SPIM3_SECURE || TFM_PERIPHERAL_SPIS3_SECURE || \
185 TFM_PERIPHERAL_TWIM3_SECURE || TFM_PERIPHERAL_TWIS3_SECURE || \
186 TFM_PERIPHERAL_UARTE3_SECURE
187 static struct irq_t serial3_irq = {0};
188
SERIAL3_IRQHandler(void)189 void SERIAL3_IRQHandler(void)
190 {
191 spm_handle_interrupt(serial3_irq.p_pt, serial3_irq.p_ildi);
192 }
193
tfm_serial3_init(void * p_pt,const struct irq_load_info_t * p_ildi)194 enum tfm_hal_status_t tfm_serial3_init(void *p_pt,
195 const struct irq_load_info_t *p_ildi)
196 {
197 return irq_init(&serial3_irq, TFM_SERIAL3_IRQ, p_pt, p_ildi);
198 }
199
200 enum tfm_hal_status_t tfm_spim3_irq_init(void *p_pt,
201 const struct irq_load_info_t *p_ildi)
202 __attribute__((alias("tfm_serial3_init")));
203
204 enum tfm_hal_status_t tfm_spis3_irq_init(void *p_pt,
205 const struct irq_load_info_t *p_ildi)
206 __attribute__((alias("tfm_serial3_init")));
207
208 enum tfm_hal_status_t tfm_twim3_irq_init(void *p_pt,
209 const struct irq_load_info_t *p_ildi)
210 __attribute__((alias("tfm_serial3_init")));
211
212 enum tfm_hal_status_t tfm_twis3_irq_init(void *p_pt,
213 const struct irq_load_info_t *p_ildi)
214 __attribute__((alias("tfm_serial3_init")));
215
216 enum tfm_hal_status_t tfm_uarte3_irq_init(void *p_pt,
217 const struct irq_load_info_t *p_ildi)
218 __attribute__((alias("tfm_serial3_init")));
219 #endif
220
221 #if TFM_PERIPHERAL_SPIM4_SECURE
222 static struct irq_t spim4_irq = {0};
223
SPIM4_IRQHandler(void)224 void SPIM4_IRQHandler(void)
225 {
226 spm_handle_interrupt(spim4_irq.p_pt, spim4_irq.p_ildi);
227 }
228
tfm_spim4_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)229 enum tfm_hal_status_t tfm_spim4_irq_init(void *p_pt,
230 const struct irq_load_info_t *p_ildi)
231 {
232 return irq_init(&spim4_irq, TFM_SPIM4_IRQ, p_pt, p_ildi);
233 }
234 #endif
235
236 #if TFM_PERIPHERAL_GPIOTE0_SECURE
237 static struct irq_t gpiote0_irq = {0};
238
GPIOTE0_IRQHandler(void)239 void GPIOTE0_IRQHandler(void)
240 {
241 spm_handle_interrupt(gpiote0_irq.p_pt, gpiote0_irq.p_ildi);
242 }
243
tfm_gpiote0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)244 enum tfm_hal_status_t tfm_gpiote0_irq_init(void *p_pt,
245 const struct irq_load_info_t *p_ildi)
246 {
247 return irq_init(&gpiote0_irq, TFM_GPIOTE0_IRQ, p_pt, p_ildi);
248 }
249 #endif
250
251 #if TFM_PERIPHERAL_SAADC_SECURE
252 static struct irq_t saadc_irq = {0};
253
SAADC_IRQHandler(void)254 void SAADC_IRQHandler(void)
255 {
256 spm_handle_interrupt(saadc_irq.p_pt, saadc_irq.p_ildi);
257 }
258
tfm_saadc_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)259 enum tfm_hal_status_t tfm_saadc_irq_init(void *p_pt,
260 const struct irq_load_info_t *p_ildi)
261 {
262 return irq_init(&saadc_irq, TFM_SAADC_IRQ, p_pt, p_ildi);
263 }
264 #endif
265
266 #if TFM_PERIPHERAL_TIMER0_SECURE
267 static struct irq_t timer0_irq = {0};
268
TIMER0_IRQHandler(void)269 void TIMER0_IRQHandler(void)
270 {
271 spm_handle_interrupt(timer0_irq.p_pt, timer0_irq.p_ildi);
272 }
273
tfm_timer0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)274 enum tfm_hal_status_t tfm_timer0_irq_init(void *p_pt,
275 const struct irq_load_info_t *p_ildi)
276 {
277 return irq_init(&timer0_irq, TFM_TIMER0_IRQ, p_pt, p_ildi);
278 }
279 #endif
280
281 #if TFM_PERIPHERAL_TIMER1_SECURE
282 static struct irq_t timer1_irq = {0};
283
TIMER1_IRQHandler(void)284 void TIMER1_IRQHandler(void)
285 {
286 spm_handle_interrupt(timer1_irq.p_pt, timer1_irq.p_ildi);
287 }
288
tfm_timer1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)289 enum tfm_hal_status_t tfm_timer1_irq_init(void *p_pt,
290 const struct irq_load_info_t *p_ildi)
291 {
292 return irq_init(&timer1_irq, TFM_TIMER1_IRQ, p_pt, p_ildi);
293 }
294 #endif
295
296 #if TFM_PERIPHERAL_TIMER2_SECURE
297 static struct irq_t timer2_irq = {0};
298
TIMER2_IRQHandler(void)299 void TIMER2_IRQHandler(void)
300 {
301 spm_handle_interrupt(timer2_irq.p_pt, timer2_irq.p_ildi);
302 }
303
tfm_timer2_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)304 enum tfm_hal_status_t tfm_timer2_irq_init(void *p_pt,
305 const struct irq_load_info_t *p_ildi)
306 {
307 return irq_init(&timer2_irq, TFM_TIMER2_IRQ, p_pt, p_ildi);
308 }
309 #endif
310
311 #if TFM_PERIPHERAL_RTC0_SECURE
312 static struct irq_t rtc0_irq = {0};
313
RTC0_IRQHandler(void)314 void RTC0_IRQHandler(void)
315 {
316 spm_handle_interrupt(rtc0_irq.p_pt, rtc0_irq.p_ildi);
317 }
318
tfm_rtc0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)319 enum tfm_hal_status_t tfm_rtc0_irq_init(void *p_pt,
320 const struct irq_load_info_t *p_ildi)
321 {
322 return irq_init(&rtc0_irq, TFM_RTC0_IRQ, p_pt, p_ildi);
323 }
324 #endif
325
326 #if TFM_PERIPHERAL_RTC1_SECURE
327 static struct irq_t rtc1_irq = {0};
328
RTC1_IRQHandler(void)329 void RTC1_IRQHandler(void)
330 {
331 spm_handle_interrupt(rtc1_irq.p_pt, rtc1_irq.p_ildi);
332 }
333
tfm_rtc1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)334 enum tfm_hal_status_t tfm_rtc1_irq_init(void *p_pt,
335 const struct irq_load_info_t *p_ildi)
336 {
337 return irq_init(&rtc1_irq, TFM_RTC1_IRQ, p_pt, p_ildi);
338 }
339 #endif
340
341 #if TFM_PERIPHERAL_WDT0_SECURE
342 static struct irq_t wdt0_irq = {0};
343
WDT0_IRQHandler(void)344 void WDT0_IRQHandler(void)
345 {
346 spm_handle_interrupt(wdt0_irq.p_pt, wdt0_irq.p_ildi);
347 }
348
tfm_wdt0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)349 enum tfm_hal_status_t tfm_wdt0_irq_init(void *p_pt,
350 const struct irq_load_info_t *p_ildi)
351 {
352 return irq_init(&wdt0_irq, TFM_WDT0_IRQ, p_pt, p_ildi);
353 }
354 #endif
355
356 #if TFM_PERIPHERAL_WDT1_SECURE
357 static struct irq_t wdt1_irq = {0};
358
WDT1_IRQHandler(void)359 void WDT1_IRQHandler(void)
360 {
361 spm_handle_interrupt(wdt1_irq.p_pt, wdt1_irq.p_ildi);
362 }
363
tfm_wdt1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)364 enum tfm_hal_status_t tfm_wdt1_irq_init(void *p_pt,
365 const struct irq_load_info_t *p_ildi)
366 {
367 return irq_init(&wdt1_irq, TFM_WDT1_IRQ, p_pt, p_ildi);
368 }
369 #endif
370
371 #if TFM_PERIPHERAL_COMP_SECURE || TFM_PERIPHERAL_LPCOMP_SECURE
372 static struct irq_t comp_lpcomp_irq = {0};
373
COMP_LPCOMP_IRQHandler(void)374 void COMP_LPCOMP_IRQHandler(void)
375 {
376 spm_handle_interrupt(comp_lpcomp_irq.p_pt, comp_lpcomp_irq.p_ildi);
377 }
378
tfm_comp_lpcomp_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)379 enum tfm_hal_status_t tfm_comp_lpcomp_irq_init(void *p_pt,
380 const struct irq_load_info_t *p_ildi)
381 {
382 return irq_init(&comp_lpcomp_irq, TFM_COMP_LPCOMP_IRQ, p_pt, p_ildi);
383 }
384
385 enum tfm_hal_status_t tfm_lpcomp_irq_init(void *p_pt,
386 const struct irq_load_info_t *p_ildi)
387 __attribute__((alias("tfm_comp_lpcomp_irq_init")));
388
389 enum tfm_hal_status_t tfm_comp_irq_init(void *p_pt,
390 const struct irq_load_info_t *p_ildi)
391 __attribute__((alias("tfm_comp_lpcomp_irq_init")));
392
393 #endif
394
395 #if TFM_PERIPHERAL_EGU0_SECURE
396 static struct irq_t egu0_irq = {0};
397
EGU0_IRQHandler(void)398 void EGU0_IRQHandler(void)
399 {
400 spm_handle_interrupt(egu0_irq.p_pt, egu0_irq.p_ildi);
401 }
402
tfm_egu0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)403 enum tfm_hal_status_t tfm_egu0_irq_init(void *p_pt,
404 const struct irq_load_info_t *p_ildi)
405 {
406 return irq_init(&egu0_irq, TFM_EGU0_IRQ, p_pt, p_ildi);
407 }
408 #endif
409
410 #if TFM_PERIPHERAL_EGU1_SECURE
411 static struct irq_t egu1_irq = {0};
412
EGU1_IRQHandler(void)413 void EGU1_IRQHandler(void)
414 {
415 spm_handle_interrupt(egu1_irq.p_pt, egu1_irq.p_ildi);
416 }
417
tfm_egu1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)418 enum tfm_hal_status_t tfm_egu1_irq_init(void *p_pt,
419 const struct irq_load_info_t *p_ildi)
420 {
421 return irq_init(&egu1_irq, TFM_EGU1_IRQ, p_pt, p_ildi);
422 }
423 #endif
424
425 #if TFM_PERIPHERAL_EGU2_SECURE
426 static struct irq_t egu2_irq = {0};
427
EGU2_IRQHandler(void)428 void EGU2_IRQHandler(void)
429 {
430 spm_handle_interrupt(egu2_irq.p_pt, egu2_irq.p_ildi);
431 }
432
tfm_egu2_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)433 enum tfm_hal_status_t tfm_egu2_irq_init(void *p_pt,
434 const struct irq_load_info_t *p_ildi)
435 {
436 return irq_init(&egu2_irq, TFM_EGU2_IRQ, p_pt, p_ildi);
437 }
438 #endif
439
440 #if TFM_PERIPHERAL_EGU3_SECURE
441 static struct irq_t egu3_irq = {0};
442
EGU3_IRQHandler(void)443 void EGU3_IRQHandler(void)
444 {
445 spm_handle_interrupt(egu3_irq.p_pt, egu3_irq.p_ildi);
446 }
447
tfm_egu3_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)448 enum tfm_hal_status_t tfm_egu3_irq_init(void *p_pt,
449 const struct irq_load_info_t *p_ildi)
450 {
451 return irq_init(&egu3_irq, TFM_EGU3_IRQ, p_pt, p_ildi);
452 }
453 #endif
454
455 #if TFM_PERIPHERAL_EGU4_SECURE
456 static struct irq_t egu4_irq = {0};
457
EGU4_IRQHandler(void)458 void EGU4_IRQHandler(void)
459 {
460 spm_handle_interrupt(egu4_irq.p_pt, egu4_irq.p_ildi);
461 }
462
tfm_egu4_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)463 enum tfm_hal_status_t tfm_egu4_irq_init(void *p_pt,
464 const struct irq_load_info_t *p_ildi)
465 {
466 return irq_init(&egu4_irq, TFM_EGU4_IRQ, p_pt, p_ildi);
467 }
468 #endif
469
470 #if TFM_PERIPHERAL_EGU5_SECURE
471 static struct irq_t egu5_irq = {0};
472
EGU5_IRQHandler(void)473 void EGU5_IRQHandler(void)
474 {
475 spm_handle_interrupt(egu5_irq.p_pt, egu5_irq.p_ildi);
476 }
477
tfm_egu5_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)478 enum tfm_hal_status_t tfm_egu5_irq_init(void *p_pt,
479 const struct irq_load_info_t *p_ildi)
480 {
481 return irq_init(&egu5_irq, TFM_EGU5_IRQ, p_pt, p_ildi);
482 }
483 #endif
484
485 #if TFM_PERIPHERAL_PWM0_SECURE
486 static struct irq_t pwm0_irq = {0};
487
PWM0_IRQHandler(void)488 void PWM0_IRQHandler(void)
489 {
490 spm_handle_interrupt(pwm0_irq.p_pt, pwm0_irq.p_ildi);
491 }
492
tfm_pwm0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)493 enum tfm_hal_status_t tfm_pwm0_irq_init(void *p_pt,
494 const struct irq_load_info_t *p_ildi)
495 {
496 return irq_init(&pwm0_irq, TFM_PWM0_IRQ, p_pt, p_ildi);
497 }
498 #endif
499
500 #if TFM_PERIPHERAL_PWM1_SECURE
501 static struct irq_t pwm1_irq = {0};
502
PWM1_IRQHandler(void)503 void PWM1_IRQHandler(void)
504 {
505 spm_handle_interrupt(pwm1_irq.p_pt, pwm1_irq.p_ildi);
506 }
507
tfm_pwm1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)508 enum tfm_hal_status_t tfm_pwm1_irq_init(void *p_pt,
509 const struct irq_load_info_t *p_ildi)
510 {
511 return irq_init(&pwm1_irq, TFM_PWM1_IRQ, p_pt, p_ildi);
512 }
513 #endif
514
515 #if TFM_PERIPHERAL_PWM2_SECURE
516 static struct irq_t pwm2_irq = {0};
517
PWM2_IRQHandler(void)518 void PWM2_IRQHandler(void)
519 {
520 spm_handle_interrupt(pwm2_irq.p_pt, pwm2_irq.p_ildi);
521 }
522
tfm_pwm2_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)523 enum tfm_hal_status_t tfm_pwm2_irq_init(void *p_pt,
524 const struct irq_load_info_t *p_ildi)
525 {
526 return irq_init(&pwm2_irq, TFM_PWM2_IRQ, p_pt, p_ildi);
527 }
528 #endif
529
530 #if TFM_PERIPHERAL_PWM3_SECURE
531 static struct irq_t pwm3_irq = {0};
532
PWM3_IRQHandler(void)533 void PWM3_IRQHandler(void)
534 {
535 spm_handle_interrupt(pwm3_irq.p_pt, pwm3_irq.p_ildi);
536 }
537
tfm_pwm3_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)538 enum tfm_hal_status_t tfm_pwm3_irq_init(void *p_pt,
539 const struct irq_load_info_t *p_ildi)
540 {
541 return irq_init(&pwm3_irq, TFM_PWM3_IRQ, p_pt, p_ildi);
542 }
543 #endif
544
545 #if TFM_PERIPHERAL_PDM0_SECURE
546 static struct irq_t pdm0_irq = {0};
547
PDM0_IRQHandler(void)548 void PDM0_IRQHandler(void)
549 {
550 spm_handle_interrupt(pdm0_irq.p_pt, pdm0_irq.p_ildi);
551 }
552
tfm_pdm0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)553 enum tfm_hal_status_t tfm_pdm0_irq_init(void *p_pt,
554 const struct irq_load_info_t *p_ildi)
555 {
556 return irq_init(&pdm0_irq, TFM_PDM0_IRQ, p_pt, p_ildi);
557 }
558 #endif
559
560 #ifdef TFM_PERIPHERAL_IPC_SECURE
561 static struct irq_t ipc_irq = {0};
562
IPC_IRQHandler(void)563 void IPC_IRQHandler(void)
564 {
565 spm_handle_interrupt(ipc_irq.p_pt, ipc_irq.p_ildi);
566 }
567
tfm_ipc_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)568 enum tfm_hal_status_t tfm_ipc_irq_init(void *p_pt,
569 const struct irq_load_info_t *p_ildi)
570 {
571 return irq_init(&ipc_irq, TFM_IPC_IRQ, p_pt, p_ildi);
572 }
573 #endif
574
575 #if TFM_PERIPHERAL_I2S0_SECURE
576 static struct irq_t i2s0_irq = {0};
577
I2S0_IRQHandler(void)578 void I2S0_IRQHandler(void)
579 {
580 spm_handle_interrupt(i2s0_irq.p_pt, i2s0_irq.p_ildi);
581 }
582
tfm_i2s0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)583 enum tfm_hal_status_t tfm_i2s0_irq_init(void *p_pt,
584 const struct irq_load_info_t *p_ildi)
585 {
586 return irq_init(&i2s0_irq, TFM_I2S0_IRQ, p_pt, p_ildi);
587 }
588 #endif
589
590 #if TFM_PERIPHERAL_QSPI_SECURE
591 static struct irq_t qspi_irq = {0};
592
QSPI_IRQHandler(void)593 void QSPI_IRQHandler(void)
594 {
595 spm_handle_interrupt(qspi_irq.p_pt, qspi_irq.p_ildi);
596 }
597
tfm_qspi_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)598 enum tfm_hal_status_t tfm_qspi_irq_init(void *p_pt,
599 const struct irq_load_info_t *p_ildi)
600 {
601 return irq_init(&qspi_irq, TFM_QSPI_IRQ, p_pt, p_ildi);
602 }
603 #endif
604
605 #if TFM_PERIPHERAL_NFCT_SECURE
606 static struct irq_t nfct_irq = {0};
607
NFCT_IRQHandler(void)608 void NFCT_IRQHandler(void)
609 {
610 spm_handle_interrupt(nfct_irq.p_pt, nfct_irq.p_ildi);
611 }
612
tfm_nfct_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)613 enum tfm_hal_status_t tfm_nfct_irq_init(void *p_pt,
614 const struct irq_load_info_t *p_ildi)
615 {
616 return irq_init(&nfct_irq, TFM_NFCT_IRQ, p_pt, p_ildi);
617 }
618 #endif
619
620 #if TFM_PERIPHERAL_QDEC0_SECURE
621 static struct irq_t qdec0_irq = {0};
622
QDEC0_IRQHandler(void)623 void QDEC0_IRQHandler(void)
624 {
625 spm_handle_interrupt(qdec0_irq.p_pt, qdec0_irq.p_ildi);
626 }
627
tfm_qdec0_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)628 enum tfm_hal_status_t tfm_qdec0_irq_init(void *p_pt,
629 const struct irq_load_info_t *p_ildi)
630 {
631 return irq_init(&qdec0_irq, TFM_QDEC0_IRQ, p_pt, p_ildi);
632 }
633 #endif
634
635 #if TFM_PERIPHERAL_QDEC1_SECURE
636 static struct irq_t qdec1_irq = {0};
637
QDEC1_IRQHandler(void)638 void QDEC1_IRQHandler(void)
639 {
640 spm_handle_interrupt(qdec1_irq.p_pt, qdec1_irq.p_ildi);
641 }
642
tfm_qdec1_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)643 enum tfm_hal_status_t tfm_qdec1_irq_init(void *p_pt,
644 const struct irq_load_info_t *p_ildi)
645 {
646 return irq_init(&qdec1_irq, TFM_QDEC1_IRQ, p_pt, p_ildi);
647 }
648 #endif
649
650 #if TFM_PERIPHERAL_USBD_SECURE
651 static struct irq_t usbd_irq = {0};
652
USBD_IRQHandler(void)653 void USBD_IRQHandler(void)
654 {
655 spm_handle_interrupt(usbd_irq.p_pt, usbd_irq.p_ildi);
656 }
657
tfm_usbd_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)658 enum tfm_hal_status_t tfm_usbd_irq_init(void *p_pt,
659 const struct irq_load_info_t *p_ildi)
660 {
661 return irq_init(&usbd_irq, TFM_USBD_IRQ, p_pt, p_ildi);
662 }
663 #endif
664
665 #if TFM_PERIPHERAL_USBREG_SECURE
666 static struct irq_t usbreg_irq = {0};
667
USBREGULATOR_IRQHandler(void)668 void USBREGULATOR_IRQHandler(void)
669 {
670 spm_handle_interrupt(usbreg_irq.p_pt, usbreg_irq.p_ildi);
671 }
672
tfm_usbreg_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)673 enum tfm_hal_status_t tfm_usbreg_irq_init(void *p_pt,
674 const struct irq_load_info_t *p_ildi)
675 {
676 return irq_init(&usbreg_irq, TFM_USBREG_IRQ, p_pt, p_ildi);
677 }
678 #endif
679
680 #ifdef PSA_API_TEST_IPC
681 enum tfm_hal_status_t ff_test_uart_irq_init(void *p_pt,
682 const struct irq_load_info_t *p_ildi)
683 __attribute__((alias("tfm_egu5_irq_init")));
684
685 #endif
686