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Searched refs:pin_mask (Results 1 – 16 of 16) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/Native_Driver/
Dgpio_cmsdk_drv.c79 static void set_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask, in set_port_config() argument
87 p_gpio_port->outenableclr = pin_mask; in set_port_config()
89 p_gpio_port->outenableset = pin_mask; in set_port_config()
93 p_gpio_port->altfuncclr = pin_mask; in set_port_config()
95 p_gpio_port->altfuncset = pin_mask; in set_port_config()
106 uint32_t pin_mask = (1UL << pin_num); in gpio_cmsdk_pin_config() local
112 set_port_config(dev, pin_mask, direction, altfunc_flags); in gpio_cmsdk_pin_config()
118 gpio_cmsdk_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask, in gpio_cmsdk_port_config() argument
122 if(pin_mask > GPIO_CMSDK_MAX_PORT_MASK) { in gpio_cmsdk_port_config()
126 set_port_config(dev, pin_mask, direction, altfunc_flags); in gpio_cmsdk_port_config()
[all …]
Dmusca_s1_scc_drv.c247 uint32_t pin_mask) in scc_clear_alt_func() argument
250 scc_regs->iomux_main_insel &= ~pin_mask; in scc_clear_alt_func()
251 scc_regs->iomux_main_outsel &= ~pin_mask; in scc_clear_alt_func()
252 scc_regs->iomux_main_oensel &= ~pin_mask; in scc_clear_alt_func()
255 scc_regs->iomux_altf1_insel &= ~pin_mask; in scc_clear_alt_func()
256 scc_regs->iomux_altf1_outsel &= ~pin_mask; in scc_clear_alt_func()
257 scc_regs->iomux_altf1_oensel &= ~pin_mask; in scc_clear_alt_func()
260 scc_regs->iomux_altf2_insel &= ~pin_mask; in scc_clear_alt_func()
261 scc_regs->iomux_altf2_outsel &= ~pin_mask; in scc_clear_alt_func()
262 scc_regs->iomux_altf2_oensel &= ~pin_mask; in scc_clear_alt_func()
[all …]
Dgpio_cmsdk_drv.h117 gpio_cmsdk_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
132 void gpio_cmsdk_config_irq(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
169 uint32_t pin_mask,
199 gpio_cmsdk_port_read(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
229 gpio_cmsdk_set_port_irq_cfg(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
262 uint32_t pin_mask, uint32_t* status);
Dmusca_s1_scc_drv.h80 enum gpio_altfunc_t altfunc, uint32_t pin_mask);
91 void musca_s1_scc_set_pinmode(struct musca_s1_scc_dev_t* dev, uint32_t pin_mask,
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/Native_Driver/
Dgpio_cmsdk_drv.c79 static void set_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask, in set_port_config() argument
87 p_gpio_port->outenableclr = pin_mask; in set_port_config()
89 p_gpio_port->outenableset = pin_mask; in set_port_config()
93 p_gpio_port->altfuncclr = pin_mask; in set_port_config()
95 p_gpio_port->altfuncset = pin_mask; in set_port_config()
106 uint32_t pin_mask = (1UL << pin_num); in gpio_cmsdk_pin_config() local
112 set_port_config(dev, pin_mask, direction, altfunc_flags); in gpio_cmsdk_pin_config()
118 gpio_cmsdk_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask, in gpio_cmsdk_port_config() argument
122 if(pin_mask > GPIO_CMSDK_MAX_PORT_MASK) { in gpio_cmsdk_port_config()
126 set_port_config(dev, pin_mask, direction, altfunc_flags); in gpio_cmsdk_port_config()
[all …]
Dmusca_b1_scc_drv.c139 uint32_t pin_mask, bool upper_pins) in scc_clear_alt_func() argument
149 *(&scc_regs->iomux_main_insel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
150 *(&scc_regs->iomux_main_outsel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
151 *(&scc_regs->iomux_main_oensel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
154 *(&scc_regs->iomux_altf1_insel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
155 *(&scc_regs->iomux_altf1_outsel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
156 *(&scc_regs->iomux_altf1_oensel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
159 *(&scc_regs->iomux_altf2_insel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
160 *(&scc_regs->iomux_altf2_outsel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
161 *(&scc_regs->iomux_altf2_oensel_0 + reg_offset) &= (~pin_mask); in scc_clear_alt_func()
[all …]
Dgpio_cmsdk_drv.h117 gpio_cmsdk_port_config(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
132 void gpio_cmsdk_config_irq(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
169 uint32_t pin_mask,
198 gpio_cmsdk_port_read(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
228 gpio_cmsdk_set_port_irq_cfg(struct gpio_cmsdk_dev_t* dev, uint32_t pin_mask,
261 uint32_t pin_mask, uint32_t* status);
Dmusca_b1_scc_drv.h95 enum gpio_altfunc_t altfunc, uint64_t pin_mask);
109 musca_b1_scc_set_pinmode(struct musca_b1_scc_dev_t* dev, uint64_t pin_mask,
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/services/include/
Dtfm_ioctl_api.h105 uint64_t pin_mask; member
113 uint64_t pin_mask; member
130 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask,
159 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode,
218 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction,
231 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value,
244 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data,
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/services/include/
Dtfm_ioctl_api.h105 uint64_t pin_mask; member
113 uint64_t pin_mask; member
130 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask,
159 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode,
218 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction,
231 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value,
244 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data,
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/services/src/
Dtfm_ioctl_ns_api.c14 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask, in tfm_platform_set_pin_alt_func() argument
28 args.u.set_altfunc.pin_mask = pin_mask; in tfm_platform_set_pin_alt_func()
75 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode, in tfm_platform_set_pin_mode() argument
88 args.u.set_pin_mode.pin_mask = pin_mask; in tfm_platform_set_pin_mode()
215 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction, in tfm_platform_gpio_port_config() argument
225 args.u.gpio_config.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_config()
244 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value, in tfm_platform_gpio_port_write() argument
254 args.u.gpio_write.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_write()
274 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data, uint32_t *result) in tfm_platform_gpio_port_read() argument
283 args.u.gpio_read.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_read()
Dtfm_ioctl_s_api.c15 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask, in tfm_platform_set_pin_alt_func() argument
29 args.u.set_altfunc.pin_mask = pin_mask; in tfm_platform_set_pin_alt_func()
82 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode, in tfm_platform_set_pin_mode() argument
95 args.u.set_pin_mode.pin_mask = pin_mask; in tfm_platform_set_pin_mode()
229 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction, in tfm_platform_gpio_port_config() argument
239 args.u.gpio_config.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_config()
259 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value, in tfm_platform_gpio_port_write() argument
269 args.u.gpio_write.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_write()
289 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data, uint32_t *result) in tfm_platform_gpio_port_read() argument
298 args.u.gpio_read.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_read()
Dtfm_platform_system.c53 args->u.set_altfunc.pin_mask); in musca_s1_pin_service()
64 args->u.set_pin_mode.pin_mask, in musca_s1_pin_service()
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/services/src/
Dtfm_ioctl_ns_api.c14 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask, in tfm_platform_set_pin_alt_func() argument
28 args.u.set_altfunc.pin_mask = pin_mask; in tfm_platform_set_pin_alt_func()
75 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode, in tfm_platform_set_pin_mode() argument
88 args.u.set_pin_mode.pin_mask = pin_mask; in tfm_platform_set_pin_mode()
215 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction, in tfm_platform_gpio_port_config() argument
225 args.u.gpio_config.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_config()
244 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value, in tfm_platform_gpio_port_write() argument
254 args.u.gpio_write.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_write()
274 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data, uint32_t *result) in tfm_platform_gpio_port_read() argument
283 args.u.gpio_read.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_read()
Dtfm_ioctl_s_api.c15 tfm_platform_set_pin_alt_func(uint32_t alt_func, uint64_t pin_mask, in tfm_platform_set_pin_alt_func() argument
29 args.u.set_altfunc.pin_mask = pin_mask; in tfm_platform_set_pin_alt_func()
82 tfm_platform_set_pin_mode(uint64_t pin_mask, uint32_t pin_mode, in tfm_platform_set_pin_mode() argument
95 args.u.set_pin_mode.pin_mask = pin_mask; in tfm_platform_set_pin_mode()
225 tfm_platform_gpio_port_config(uint32_t pin_mask, uint32_t direction, in tfm_platform_gpio_port_config() argument
235 args.u.gpio_config.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_config()
254 tfm_platform_gpio_port_write(uint32_t pin_mask, uint32_t value, in tfm_platform_gpio_port_write() argument
264 args.u.gpio_write.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_write()
283 tfm_platform_gpio_port_read(uint32_t pin_mask, uint32_t *data, uint32_t *result) in tfm_platform_gpio_port_read() argument
292 args.u.gpio_read.pin_num_or_mask = pin_mask; in tfm_platform_gpio_port_read()
Dtfm_platform_system.c53 args->u.set_altfunc.pin_mask); in musca_b1_pin_service()
64 args->u.set_pin_mode.pin_mask, in musca_b1_pin_service()