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Searched refs:WORD_ALIGN_4B_MASK (Results 1 – 3 of 3) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/Native_Driver/
Dgfc100_eflash_drv.c35 #define WORD_ALIGN_4B_MASK 0x3U /* Masks the first 2 bits */ macro
36 #define IS_ADDR_4B_ALIGNED(addr) (((uint32_t)addr & WORD_ALIGN_4B_MASK) == 0U)
Dqspi_ip6514e_drv.c32 #define WORD_ALIGN_4B_MASK 0x3U /* Mask the first 2 bits */ macro
33 #define IS_ADDR_ALIGNED(ADDR) (((uint32_t)(ADDR) & (WORD_ALIGN_4B_MASK)) == 0U)
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/Native_Driver/
Dqspi_ip6514e_drv.c32 #define WORD_ALIGN_4B_MASK 0x3U /* Mask the first 2 bits */ macro
33 #define IS_ADDR_ALIGNED(ADDR) (((uint32_t)(ADDR) & (WORD_ALIGN_4B_MASK)) == 0U)