| /trusted-firmware-a-latest/drivers/marvell/ |
| D | ccu.c | 72 uint32_t win_id, win_cr, alr, ahr; in dump_ccu() local
79 for (win_id = 0; win_id < MVEBU_CCU_MAX_WINS; win_id++) { in dump_ccu()
80 win_cr = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in dump_ccu()
85 win_id)); in dump_ccu()
87 win_id)); in dump_ccu()
91 win_id, target_id, start, end); in dump_ccu()
117 int ccu_is_win_enabled(int ap_index, uint32_t win_id) in ccu_is_win_enabled() argument
119 return mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)) & in ccu_is_win_enabled()
123 void ccu_enable_win(int ap_index, struct addr_map_win *win, uint32_t win_id) in ccu_enable_win() argument
129 if ((win_id == 0) || (win_id > MVEBU_CCU_MAX_WINS)) { in ccu_enable_win()
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| D | io_win.c | 117 uint32_t win_id; in iow_temp_win_insert() local
120 win_id = MVEBU_IO_WIN_MAX_WINS - i - 1; in iow_temp_win_insert()
122 io_win_enable_window(ap_index, win, win_id); in iow_temp_win_insert()
133 uint32_t win_id; in iow_temp_win_remove() local
140 win_id = MVEBU_IO_WIN_MAX_WINS - i - 1; in iow_temp_win_remove()
142 target = mmio_read_32(IO_WIN_CR_OFFSET(ap_index, win_id)); in iow_temp_win_remove()
143 base = mmio_read_32(IO_WIN_ALR_OFFSET(ap_index, win_id)); in iow_temp_win_remove()
149 __func__, win_id); in iow_temp_win_remove()
152 io_win_disable_window(ap_index, win_id); in iow_temp_win_remove()
160 uint32_t trgt_id, win_id; in dump_io_win() local
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| D | iob.c | 76 static void iob_enable_win(struct addr_map_win *win, uint32_t win_id) in iob_enable_win() argument
97 mmio_write_32(IOB_WIN_ALR_OFFSET(win_id), alr); in iob_enable_win()
98 mmio_write_32(IOB_WIN_AHR_OFFSET(win_id), ahr); in iob_enable_win()
103 mmio_write_32(IOB_WIN_CR_OFFSET(win_id), iob_win_reg); in iob_enable_win()
110 uint32_t win_id, win_cr, alr, ahr; in dump_iob() local
120 for (win_id = 0; win_id < MVEBU_IOB_MAX_WINS; win_id++) { in dump_iob()
121 win_cr = mmio_read_32(IOB_WIN_CR_OFFSET(win_id)); in dump_iob()
125 alr = mmio_read_32(IOB_WIN_ALR_OFFSET(win_id)); in dump_iob()
127 if (win_id != 0) { in dump_iob()
128 ahr = mmio_read_32(IOB_WIN_AHR_OFFSET(win_id)); in dump_iob()
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| D | amb_adec.c | 99 uint32_t ctrl, base, win_id, attr; in dump_amb_adec() local
105 for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) { in dump_amb_adec()
106 ctrl = mmio_read_32(AMB_WIN_CR_OFFSET(win_id)); in dump_amb_adec()
108 base = mmio_read_32(AMB_WIN_BASE_OFFSET(win_id)); in dump_amb_adec()
122 uint32_t win_id, win_reg; in init_amb_adec() local
141 for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) { in init_amb_adec()
142 win_reg = mmio_read_32(AMB_WIN_CR_OFFSET(win_id)); in init_amb_adec()
144 mmio_write_32(AMB_WIN_CR_OFFSET(win_id), win_reg); in init_amb_adec()
148 for (win_id = 0; win_id < win_count; win_id++, win++) { in init_amb_adec()
149 amb_check_win(win, win_id); in init_amb_adec()
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| D | gwin.c | 112 uint32_t win_id; in gwin_temp_win_insert() local
115 win_id = MVEBU_GWIN_MAX_WINS - i - 1; in gwin_temp_win_insert()
117 gwin_enable_window(ap_index, win, win_id); in gwin_temp_win_insert()
128 uint32_t win_id; in gwin_temp_win_remove() local
134 win_id = MVEBU_GWIN_MAX_WINS - i - 1; in gwin_temp_win_remove()
136 target = mmio_read_32(GWIN_CR_OFFSET(ap_index, win_id)); in gwin_temp_win_remove()
140 base = mmio_read_32(GWIN_ALR_OFFSET(ap_index, win_id)); in gwin_temp_win_remove()
146 __func__, win_id); in gwin_temp_win_remove()
149 gwin_disable_window(ap_index, win_id); in gwin_temp_win_remove()
183 uint32_t win_id; in init_gwin() local
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| /trusted-firmware-a-latest/drivers/marvell/mc_trustzone/ |
| D | mc_trustzone.c | 32 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id) in tz_enable_win() argument
37 if ((win_id < 0) || (win_id > MVEBU_TZ_MAX_WINS)) { in tz_enable_win()
38 ERROR("Enabling wrong MC TrustZone window %d!\n", win_id); in tz_enable_win()
49 win_id); in tz_enable_win()
64 mmio_write_32(MVEBU_AP_MC_TRUSTZONE_REG_LOW(ap_index, win_id), val); in tz_enable_win()
66 VERBOSE("%s: Win%d[0x%x] configured to 0x%x\n", __func__, win_id, in tz_enable_win()
67 MVEBU_AP_MC_TRUSTZONE_REG_LOW(ap_index, win_id), in tz_enable_win()
68 mmio_read_32(MVEBU_AP_MC_TRUSTZONE_REG_LOW(ap_index, win_id))); in tz_enable_win()
70 mmio_write_32(MVEBU_AP_MC_TRUSTZONE_REG_HIGH(ap_index, win_id), in tz_enable_win()
73 VERBOSE("%s: Win%d[0x%x] configured to 0x%x\n", __func__, win_id, in tz_enable_win()
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| D | mc_trustzone.h | 25 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id);
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| /trusted-firmware-a-latest/plat/marvell/armada/a3k/common/ |
| D | dram_win.c | 189 int32_t win_id; in dram_win_map_build() local
194 for (win_id = 0; win_id < DRAM_WIN_MAP_NUM_MAX; win_id++) { in dram_win_map_build()
195 ctrl_reg = mmio_read_32(CPU_DEC_WIN_CTRL_REG(win_id)); in dram_win_map_build()
204 base_reg = mmio_read_32(CPU_DEC_WIN_BASE_REG(win_id)); in dram_win_map_build()
205 size_reg = mmio_read_32(CPU_DEC_WIN_SIZE_REG(win_id)); in dram_win_map_build()
225 static void cpu_win_set(uint32_t win_id, struct cpu_win_configuration *win_cfg) in cpu_win_set() argument
230 ctrl_reg = mmio_read_32(CPU_DEC_WIN_CTRL_REG(win_id)); in cpu_win_set()
232 mmio_write_32(CPU_DEC_WIN_CTRL_REG(win_id), ctrl_reg); in cpu_win_set()
243 mmio_write_32(CPU_DEC_WIN_BASE_REG(win_id), base_reg); in cpu_win_set()
252 mmio_write_32(CPU_DEC_REMAP_LOW_REG(win_id), remap_reg); in cpu_win_set()
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| D | io_addr_dec.c | 36 static void set_io_addr_dec_win(int win_id, uintptr_t base_addr, in set_io_addr_dec_win() argument
56 win_id, dec_win->win_offset), in set_io_addr_dec_win()
59 if (win_id < dec_win->max_remap) in set_io_addr_dec_win()
61 win_id, dec_win->win_offset), base); in set_io_addr_dec_win()
64 win_id, dec_win->win_offset), ctrl); in set_io_addr_dec_win()
68 win_id, dec_win->win_offset), ctrl); in set_io_addr_dec_win()
71 win_id, mmio_read_32(MVEBU_DEC_WIN_CTRL_REG(dec_win->dec_reg_base, in set_io_addr_dec_win()
72 win_id, dec_win->win_offset)), in set_io_addr_dec_win()
74 win_id, dec_win->win_offset)), in set_io_addr_dec_win()
75 (win_id < dec_win->max_remap) ? in set_io_addr_dec_win()
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| /trusted-firmware-a-latest/plat/marvell/armada/a8k/common/mss/ |
| D | mss_bl2_setup.c | 52 int cfg_num, win_id, cfg_idx, cp; in bl2_plat_mmap_init() local
66 for (cfg_idx = 0, win_id = 1; in bl2_plat_mmap_init()
67 (win_id < MVEBU_CCU_MAX_WINS) && (cfg_idx < cfg_num); win_id++) { in bl2_plat_mmap_init()
69 if (ccu_is_win_enabled(MVEBU_AP0, win_id)) in bl2_plat_mmap_init()
73 ccu_enable_win(MVEBU_AP0, &ccu_mem_map[cfg_idx], win_id); in bl2_plat_mmap_init()
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| /trusted-firmware-a-latest/plat/marvell/armada/a8k/common/ |
| D | plat_bl31_setup.c | 94 int tz_nr, win_id; in marvell_bl31_security_setup() local
98 for (win_id = 0; win_id < tz_nr; win_id++) in marvell_bl31_security_setup()
99 tz_enable_win(MVEBU_AP0, tz_map, win_id); in marvell_bl31_security_setup()
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| /trusted-firmware-a-latest/include/drivers/marvell/ |
| D | ccu.h | 42 void ccu_enable_win(int ap_index, struct addr_map_win *win, uint32_t win_id);
49 int ccu_is_win_enabled(int ap_index, uint32_t win_id);
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