| /trusted-firmware-a-latest/docs/plat/ |
| D | imx8.rst | 13 and 1 Cortex-M4 system controller.
15 The i.MX8QX is with 4 Cortex-A35 ARM core and 1 Cortex-M4 system
19 control for system-level resources on i.MX8. The heart of the system
20 controller is a Cortex-M4 that executes system controller firmware.
54 with certain offset for BOOT ROM. The system controller firmware,
|
| D | qemu-sbsa.rst | 7 is made by EDK2 build system by composing BL1 and FIP. Second parameter for Qemu
9 contains of UEFI and EFI variables (also made by EDK2 build system). Semihosting
50 EDK2 build system, refer to edk2-platform repo for full build instructions.
|
| D | synquacer.rst | 38 few specialist tools. On a Debian or Ubuntu operating system try:
103 - Providing your Developerbox is fully working and has on operating system
104 installed then you can adopt your the newly compiled system firmware using
|
| D | qemu.rst | 85 qemu-system-aarch64 -nographic -machine virt,secure=on -cpu cortex-a57 \
94 An alternate approach to deploy a full system stack on QEMU is to load the
140 qemu-system-aarch64 -nographic -machine virt,secure=on
167 `binaries`_ for UEFI, the kernel, root file system, as well as, any other TF-A
|
| /trusted-firmware-a-latest/plat/arm/board/rde1edge/fdts/ |
| D | rde1edge_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/plat/arm/board/sgi575/fdts/ |
| D | sgi575_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/plat/arm/board/rdn1edge/fdts/ |
| D | rdn1edge_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/plat/arm/board/rdv1/fdts/ |
| D | rdv1_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/plat/arm/board/rdv1mc/fdts/ |
| D | rdv1mc_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/soc/t194/drivers/mce/ |
| D | nvg.c | 62 uint32_t system, uint32_t wake_mask, uint8_t update_wake_mask) in nvg_update_cstate_info() argument
79 if (system != 0U) { in nvg_update_cstate_info()
80 val |= (((uint64_t)system & SYSTEM_CSTATE_MASK) << SYSTEM_CSTATE_SHIFT) | in nvg_update_cstate_info()
|
| D | mce.c | 126 nvg_update_cstate_info(cstate->cluster, cstate->ccplex, cstate->system, in mce_update_cstate_info()
|
| /trusted-firmware-a-latest/plat/arm/board/rdn2/fdts/ |
| D | rdn2_nt_fw_config.dts | 13 * Place holder for system-id node with default values. The
17 system-id {
|
| /trusted-firmware-a-latest/docs/design_documents/ |
| D | drtm_poc.rst | 9 world bootloader. As a whole, they make up the system's TCB. These boot
10 measurements allow attesting to what software is running on the system and
19 the security of the system.
31 must be implemented as a trusted agent in the system. The D-CRTM
37 system’s state, measures security-critical attributes of the system,
45 configuration of the system.
|
| D | measured_boot.rst | 13 These measurements can be leveraged by other components in the system to
14 implement a complete attestation system. For example, they could be used to
20 records what code/critical-data was present on the system during boot.
82 measurements on an SBSA/SBBR server system. By considering these
126 somewhere, or panicking the system if this is considered a fatal error.
174 system if this is considered a fatal error.
|
| /trusted-firmware-a-latest/docs/design/ |
| D | alt-boot-flows.rst | 7 On a pre-production system, the ability to execute arbitrary, bare-metal code at
13 configuration required to put the system in the expected state.
21 - putting the system into a known architectural state;
30 The system is left in the same state as when entering BL31 in the default boot
61 connection is usually available in a pre-production system. The user is free to
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| D | nvg.c | 48 uint32_t system, uint8_t sys_state_force, uint32_t wake_mask, in nvg_update_cstate_info() argument
68 if (system != 0U) { in nvg_update_cstate_info()
69 val |= (((uint64_t)system & SYSTEM_CSTATE_MASK) << SYSTEM_CSTATE_SHIFT) | in nvg_update_cstate_info()
|
| D | ari.c | 161 uint32_t system, uint8_t sys_state_force, uint32_t wake_mask, in ari_update_cstate_info() argument
182 if (system != 0U) { in ari_update_cstate_info()
183 val |= ((system & SYSTEM_CSTATE_MASK) << SYSTEM_CSTATE_SHIFT) | in ari_update_cstate_info()
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/include/drivers/ |
| D | mce.h | 57 uint32_t system; member
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/soc/t186/drivers/include/ |
| D | mce_private.h | 98 uint32_t system,
224 uint32_t system, uint8_t sys_state_force, uint32_t wake_mask,
247 uint32_t system, uint8_t sys_state_force, uint32_t wake_mask,
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/soc/t194/drivers/include/ |
| D | mce_private.h | 50 uint32_t system, uint32_t wake_mask, uint8_t update_wake_mask);
|
| /trusted-firmware-a-latest/drivers/nxp/ddr/nxp-ddr/ |
| D | README.odt | 3 Two-slot system
|
| /trusted-firmware-a-latest/docs/components/fconf/ |
| D | mpmm-bindings.rst | 30 An example system offering two cores, one with support for |MPMM| and one
|
| D | amu-bindings.rst | 31 The ``amus`` node describes the |AMUs| implemented by the cores in the system.
73 An example system offering four cores made up of two clusters, where the cores
|
| /trusted-firmware-a-latest/docs/components/ |
| D | platform-interrupt-controller-API.rst | 34 associated to system-wide peripherals, and these interrupts can target any PE in
35 the system.
87 ``id``. PEs in the system are expected to receive only enabled interrupts.
102 ``id``. PEs in the system are not expected to receive disabled interrupts.
231 system. The ``mpidr`` parameter is ignored in this case.
|
| D | granule-protection-tables-design.rst | 7 the systems memory layout, configure the system registers to enable granule
63 protected physical address space in the system, PGS (physical granule size)
121 tables should have PAS type ``GPT_GPI_ROOT`` and a typical system might place
141 called in the correct order and at the correct time during the system boot
148 #. DDR discovery and initialization by the system, the discovered DDR region(s)
|
