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Searched refs:region (Results 1 – 25 of 65) sorted by relevance

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/trusted-firmware-a-latest/plat/nxp/common/setup/
Dls_common.c67 (void *) info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
68 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
69 + info_dram_regions->region[i].size in mmap_add_ddr_regions_statically()
71 mmap_add_region(info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
72 info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
73 info_dram_regions->region[i].size, in mmap_add_ddr_regions_statically()
77 if (info_dram_regions->region[i].size > in mmap_add_ddr_regions_statically()
80 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
81 + info_dram_regions->region[i].size), in mmap_add_ddr_regions_statically()
82 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
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Dls_bl2_el3_setup.c42 dram_regions_info.region[reg_id].addr = NXP_DRAM0_ADDR; in populate_dram_regions_info()
43 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
47 if (dram_regions_info.region[reg_id].size != NXP_DRAM0_SIZE) { in populate_dram_regions_info()
51 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
52 dram_regions_info.region[reg_id].size -= (NXP_SECURE_DRAM_SIZE in populate_dram_regions_info()
55 assert(dram_regions_info.region[reg_id].size > 0); in populate_dram_regions_info()
64 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
65 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
68 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
74 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
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Dls_bl31_setup.c99 dram_regions_info.region[0].addr = 0x80000000; in bl31_early_platform_setup2()
100 dram_regions_info.region[0].size = 0x80000000; in bl31_early_platform_setup2()
101 dram_regions_info.region[1].addr = 0x880000000; in bl31_early_platform_setup2()
102 dram_regions_info.region[1].size = 0x80000000; in bl31_early_platform_setup2()
136 dram_regions_info.region[i].addr = in bl31_early_platform_setup2()
137 loc_dram_regions_info->region[i].addr; in bl31_early_platform_setup2()
138 dram_regions_info.region[i].size = in bl31_early_platform_setup2()
139 loc_dram_regions_info->region[i].size; in bl31_early_platform_setup2()
141 dram_regions_info.region[i].size); in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/mediatek/drivers/emi_mpu/
Demi_mpu_common.c29 unsigned int region; in _emi_mpu_set_protection() local
31 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
36 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
42 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
48 region_lock_state[region] = 1; in _emi_mpu_set_protection()
64 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
65 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
66 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
69 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
70 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
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/trusted-firmware-a-latest/tools/memory/memory/
Dmapparser.py52 region, _, attr = tuple(symbol.lower().strip("__").split("_"))
53 if region not in memory_layout:
54 memory_layout[region] = {}
56 memory_layout[region][attr] = self._symbols[symbol]
58 if "start" and "length" and "end" in memory_layout[region]:
59 memory_layout[region]["limit"] = (
60 memory_layout[region]["end"]
61 + memory_layout[region]["length"]
63 memory_layout[region]["free"] = (
64 memory_layout[region]["limit"]
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Delfparser.py121 region, _, attr = tuple(symbol.lower().strip("__").split("_"))
122 if region not in memory_layout:
123 memory_layout[region] = {}
126 memory_layout[region][attr] = self._symbols[symbol]
/trusted-firmware-a-latest/plat/mediatek/drivers/emi_mpu/mt8188/
Demi_mpu_priv.h16 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
17 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
19 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
29 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
30 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
32 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
Demi_mpu.c20 region_info.region = 2; in set_emi_mpu_regions()
31 region_info.region = 3; in set_emi_mpu_regions()
42 region_info.region = 4; in set_emi_mpu_regions()
53 region_info.region = 31; in set_emi_mpu_regions()
68 region_info.region = APUSYS_SEC_BUF_EMI_REGION; in set_apu_emi_mpu_region()
107 region_info.region = 4; in emi_mpu_optee_handler()
/trusted-firmware-a-latest/plat/mediatek/mt8192/drivers/emi_mpu/
Demi_mpu.c23 unsigned int region; in _emi_mpu_set_protection() local
25 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
30 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
31 WARN("Region:%u or dgroup:%u is wrong!\n", region, dgroup); in _emi_mpu_set_protection()
46 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
47 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
48 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
57 int region, i; in dump_emi_mpu_regions() local
60 for (region = 0; region < 8; ++region) { in dump_emi_mpu_regions()
62 apc[i] = mmio_read_32(EMI_MPU_APC(region, i)); in dump_emi_mpu_regions()
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Demi_mpu.h43 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region) * 4) argument
44 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region) * 4) argument
47 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region) * 4 + \ argument
94 unsigned int region; member
/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/emi_mpu/
Demi_mpu.c27 unsigned int region; in _emi_mpu_set_protection() local
29 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
34 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
40 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
46 region_lock_state[region] = 1; in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
63 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
64 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
67 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
68 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
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Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/emi_mpu/
Demi_mpu.c25 unsigned int region; in _emi_mpu_set_protection() local
27 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
32 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
38 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
44 region_lock_state[region] = 1; in _emi_mpu_set_protection()
60 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
61 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
65 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
66 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
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Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/trusted-firmware-a-latest/drivers/arm/tzc/
Dtzc380.c32 static void tzc380_write_region_base_low(uintptr_t base, unsigned int region, in tzc380_write_region_base_low() argument
35 mmio_write_32(base + REGION_SETUP_LOW_OFF(region), val); in tzc380_write_region_base_low()
38 static void tzc380_write_region_base_high(uintptr_t base, unsigned int region, in tzc380_write_region_base_high() argument
41 mmio_write_32(base + REGION_SETUP_HIGH_OFF(region), val); in tzc380_write_region_base_high()
44 static void tzc380_write_region_attributes(uintptr_t base, unsigned int region, in tzc380_write_region_attributes() argument
47 mmio_write_32(base + REGION_ATTRIBUTES_OFF(region), val); in tzc380_write_region_attributes()
83 void tzc380_configure_region(uint8_t region, uintptr_t region_base, unsigned int attr) in tzc380_configure_region() argument
87 assert(region < tzc380.num_regions); in tzc380_configure_region()
89 tzc380_write_region_base_low(tzc380.base, region, addr_low(region_base)); in tzc380_configure_region()
90 tzc380_write_region_base_high(tzc380.base, region, addr_high(region_base)); in tzc380_configure_region()
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Dtzc400.c241 unsigned int region, in tzc400_configure_region() argument
256 (region < tzc400.num_regions)); in tzc400_configure_region()
270 _tzc400_configure_region(tzc400.base, filters, region, region_base, in tzc400_configure_region()
275 void tzc400_update_filters(unsigned int region, unsigned int filters) in tzc400_update_filters() argument
279 (region < tzc400.num_regions)); in tzc400_update_filters()
281 _tzc400_update_filters(tzc400.base, region, tzc400.num_filters, filters); in tzc400_update_filters()
/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhikey_security.c51 static volatile struct rgn_map_reg *get_rgn_map_reg(uint32_t base, int region, int port) in get_rgn_map_reg() argument
53 uint64_t addr = base + 0x100 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_map_reg()
57 static volatile struct rgn_attr_reg *get_rgn_attr_reg(uint32_t base, int region, in get_rgn_attr_reg() argument
60 uint64_t addr = base + 0x104 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_attr_reg()
70 int region) in sec_protect() argument
78 assert(region > 0 && region < 16); in sec_protect()
91 rgn_map = get_rgn_map_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
92 rgn_attr = get_rgn_attr_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
/trusted-firmware-a-latest/drivers/arm/css/sds/
Dsds_private.h88 #define IS_SDS_REGION_VALID(region) \ argument
89 (((((region_desc_t *)(region))->reg[0]) & SDS_REGION_SIGNATURE_MASK) == SDS_REGION_SIGNATURE)
90 #define GET_SDS_REGION_STRUCTURE_COUNT(region) \ argument
91 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_STRUCT_COUNT_SHIFT)\
93 #define GET_SDS_REGION_SCHEMA_VERSION(region) \ argument
94 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_SCH_MINOR_SHIFT)\
96 #define GET_SDS_REGION_SIZE(region) ((((region_desc_t *)(region))->reg[1])) argument
/trusted-firmware-a-latest/services/std_svc/drtm/
Ddrtm_res_address_map.c43 map->region[i].region_address = mmap[i].base_pa; in drtm_build_address_map()
46 map->region[i].region_size_type = 0; in drtm_build_address_map()
48 map->region[i].region_size_type, in drtm_build_address_map()
55 map->region[i].region_size_type, in drtm_build_address_map()
60 map->region[i].region_size_type, in drtm_build_address_map()
63 map->region[i].region_size_type, in drtm_build_address_map()
68 map->region[i].region_size_type, in drtm_build_address_map()
/trusted-firmware-a-latest/include/drivers/arm/
Dtzc400.h107 unsigned int region,
112 void tzc400_update_filters(unsigned int region, unsigned int filters);
132 unsigned int region, in tzc_configure_region() argument
138 tzc400_configure_region(filters, region, region_base, in tzc_configure_region()
Dtzc380.h143 void tzc380_configure_region(uint8_t region,
152 static inline void tzc_configure_region(uint8_t region, in tzc_configure_region() argument
156 tzc380_configure_region(region, region_base, attr); in tzc_configure_region()
/trusted-firmware-a-latest/drivers/io/
Dio_block.c131 io_block_spec_t *region; in block_open() local
137 region = (io_block_spec_t *)spec; in block_open()
139 assert(((region->offset % cur->dev_spec->block_size) == 0) && in block_open()
140 ((region->length % cur->dev_spec->block_size) == 0)); in block_open()
142 cur->base = region->offset; in block_open()
143 cur->size = region->length; in block_open()
/trusted-firmware-a-latest/plat/mediatek/mt8183/drivers/emi_mpu/
Demi_mpu.c26 int region, in emi_mpu_set_region_protection() argument
50 switch (region) { in emi_mpu_set_region_protection()
/trusted-firmware-a-latest/plat/nxp/soc-ls1046a/
Dsoc.c279 if (info_dram_regions->region[dram_idx].size == 0) { in soc_mem_access()
287 info_dram_regions->region[dram_idx].addr, in soc_mem_access()
288 info_dram_regions->region[dram_idx].size, in soc_mem_access()
/trusted-firmware-a-latest/docs/components/
Dgranule-protection-tables-design.rst47 PAS region is configured. The first step is the level 0 table, each entry in the
48 level 0 table controls access to a relatively large region in memory (block
49 descriptor), and the entire region can belong to a single PAS when a one step
83 region definitions in the file ``include/plat/arm/common/arm_pas_def.h``. Table
97 #. The region size
98 #. The desired attributes of this memory region (mapping type, PAS type)
109 compatibility issues. These macros take the base physical address, region size,
111 imply, ``GPT_MAP_REGION_BLOCK`` creates a region using only L0 mapping while
112 ``GPT_MAP_REGION_GRANULE`` creates a region using L0 and L1 mappings.
148 #. DDR discovery and initialization by the system, the discovered DDR region(s)
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