Searched refs:fixed (Results 1 – 25 of 42) sorted by relevance
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| /trusted-firmware-a-latest/plat/renesas/common/ |
| D | rcar_common.c | 55 unsigned int fixed = 0; in plat_ea_handler() local
57 fixed |= rcar_pcie_fixup(0); in plat_ea_handler()
58 fixed |= rcar_pcie_fixup(1); in plat_ea_handler()
60 if (fixed) in plat_ea_handler()
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| /trusted-firmware-a-latest/fdts/ |
| D | a5ds.dts | 68 compatible = "fixed-clock";
75 compatible = "fixed-clock";
82 compatible = "fixed-clock";
139 v2m_fixed_3v3: fixed-regulator-0 {
140 compatible = "regulator-fixed";
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| D | morello.dtsi | 85 compatible = "fixed-clock";
92 compatible = "fixed-clock";
99 compatible = "fixed-clock";
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| D | fvp-foundation-motherboard.dtsi | 21 compatible = "fixed-clock";
28 compatible = "fixed-clock";
35 compatible = "fixed-clock";
135 compatible = "regulator-fixed";
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| D | stm32mp251.dtsi | 30 compatible = "fixed-clock";
36 compatible = "fixed-clock";
42 compatible = "fixed-clock";
48 compatible = "fixed-clock";
54 compatible = "fixed-clock";
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| D | corstone700.dtsi | 51 compatible = "fixed-clock";
59 compatible = "fixed-clock";
67 compatible = "fixed-clock";
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| D | n1sdp-single-chip.dts | 34 compatible = "fixed-clock";
41 compatible = "fixed-clock";
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| D | tc.dts | 310 compatible = "fixed-clock";
317 compatible = "fixed-clock";
324 compatible = "fixed-clock";
389 compatible = "fixed-clock";
418 compatible = "fixed-clock";
438 compatible = "regulator-fixed";
460 compatible = "fixed-clock";
466 compatible = "fixed-clock";
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| D | stm32mp15xx-dhcor-io1v8.dtsi | 11 compatible = "regulator-fixed";
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| D | rtsm_ve-motherboard.dtsi | 14 compatible = "fixed-clock";
21 compatible = "fixed-clock";
28 compatible = "fixed-clock";
35 compatible = "regulator-fixed";
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| D | arm_fpga.dts | 68 compatible = "fixed-clock";
75 compatible = "fixed-clock";
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| D | stm32mp131.dtsi | 32 compatible = "fixed-clock";
38 compatible = "fixed-clock";
44 compatible = "fixed-clock";
50 compatible = "fixed-clock";
56 compatible = "fixed-clock";
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| D | stm32mp157c-lxa-mc1.dts | 40 compatible = "regulator-fixed";
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| D | n1sdp.dtsi | 71 compatible = "fixed-clock";
78 compatible = "fixed-clock";
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| D | fvp-ve-Cortex-A7x1.dts | 64 compatible = "fixed-clock";
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| D | stm32mp151.dtsi | 43 compatible = "fixed-clock";
49 compatible = "fixed-clock";
55 compatible = "fixed-clock";
61 compatible = "fixed-clock";
67 compatible = "fixed-clock";
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| D | stm32mp135f-dk.dts | 36 compatible = "regulator-fixed";
44 compatible = "regulator-fixed";
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| D | morello-soc.dts | 279 compatible = "fixed-clock";
302 compatible = "fixed-clock";
453 compatible = "fixed-clock";
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| D | morello-fvp.dts | 186 compatible = "fixed-clock";
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| D | stm32mp15xx-dkx.dtsi | 23 compatible = "regulator-fixed";
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| /trusted-firmware-a-latest/docs/design/ |
| D | cpu-specific-build-macros.rst | 250 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to
303 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
365 fixed in r0p1.
369 fixed in r0p1.
468 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
472 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
476 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
480 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
514 It has been fixed in r1p2.
523 It has been fixed in r1p2.
[all …]
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| /trusted-firmware-a-latest/docs/security_advisories/ |
| D | security-advisory-tfv-5.rst | 50 NOTE: The original pull request referenced above only fixed the issue for S-EL1
51 whereas the EL3 was fixed in the later commits.
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| D | security-advisory-tfv-11.rst | 65 The vulnerability is fixed by ensuring that the Interrupt ID provided by the
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| /trusted-firmware-a-latest/drivers/st/clk/ |
| D | stm32mp1_clk.c | 244 uint8_t fixed; /* Relates to enum stm32mp1_parent_id */ member
276 .fixed = _UNKNOWN_ID, \
288 .fixed = (f), \
300 .fixed = _UNKNOWN_ID, \
312 .fixed = (f), \
734 return (enum stm32mp1_parent_id)(gate_ref(i)->fixed); in stm32mp1_clk_get_fixed_parent()
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| /trusted-firmware-a-latest/docs/threat_model/ |
| D | threat_model_fvp_r.rst | 89 fvp_r implementation is limited to BL1, since BL1's regions are fixed,
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