Searched refs:dds (Results 1 – 1 of 1) sorted by relevance
| /trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/apusys/ |
| D | apupll.c | 238 static int32_t _cal_pll_data(uint32_t *pd, uint32_t *dds, uint32_t freq) in _cal_pll_data() argument
261 *dds = pcw_val | RG_PLL_SDM_PCW_CHG; in _cal_pll_data()
510 uint32_t pd, old_pd, dds; in anpu_pll_set_rate() local
519 _cal_pll_data(&pd, &dds, freq / 1000); in anpu_pll_set_rate()
522 __func__, pllidx2name(pll_idx), pd, dds, freq / 1000, mode); in anpu_pll_set_rate()
537 (pd & POSDIV_MASK) << POSDIV_SHIFT | dds; in anpu_pll_set_rate()
544 apupwr_writel(dds, fhctl_dds_addr[pll_idx]); in anpu_pll_set_rate()
556 apupwr_writel(dds, fhctl_dvfs_addr[pll_idx]); in anpu_pll_set_rate()
558 apupwr_writel(dds, fhctl_dvfs_addr[pll_idx]); in anpu_pll_set_rate()
561 ret = _fhctl_mon_done(pll_idx, dds); in anpu_pll_set_rate()
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