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/trusted-firmware-a-latest/fdts/
Dstm32mp251.dtsi8 #include <dt-bindings/interrupt-controller/arm-gic.h>
59 intc: interrupt-controller@4ac00000 {
63 interrupt-controller;
147 gpio-controller;
149 interrupt-controller;
158 gpio-controller;
160 interrupt-controller;
169 gpio-controller;
171 interrupt-controller;
180 gpio-controller;
[all …]
Dfvp-base-gicv3.dtsi10 gic: interrupt-controller@2f000000 {
16 interrupt-controller;
24 its: msi-controller@2f020000 {
26 msi-controller;
Dstm32mp151.dtsi6 #include <dt-bindings/interrupt-controller/arm-gic.h>
32 intc: interrupt-controller@a0021000 {
35 interrupt-controller;
239 interrupt-controller;
243 exti: interrupt-controller@5000d000 {
245 interrupt-controller;
249 /* exti_pwr is an extra interrupt controller used for
251 * controller.
254 interrupt-controller;
284 fmc: memory-controller@58002000 {
[all …]
Dstm32mp131.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
61 intc: interrupt-controller@a0021000 {
64 interrupt-controller;
249 exti: interrupt-controller@5000d000 {
251 interrupt-controller;
278 fmc: memory-controller@58002000 {
292 nand-controller@4,0 {
474 gpio-controller;
476 interrupt-controller;
486 gpio-controller;
[all …]
Dfvp-base-gicv2.dtsi10 gic: interrupt-controller@2f000000 {
14 interrupt-controller;
Darm_fpga.dts11 #include <dt-bindings/interrupt-controller/arm-gic.h>
89 gic: interrupt-controller@30000000 {
95 interrupt-controller;
101 its: msi-controller@30040000 {
105 msi-controller;
Dn1sdp.dtsi6 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 gic: interrupt-controller@30000000 {
96 interrupt-controller;
104 msi-controller;
111 msi-controller;
118 msi-controller;
125 msi-controller;
Dfvp-foundation-gicv3-psci.dts14 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 gic: interrupt-controller@2f000000 {
96 interrupt-controller;
106 msi-controller;
Dfvp-ve-Cortex-A7x1.dts7 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 gic: interrupt-controller@2c001000 {
54 interrupt-controller;
Dmorello.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 gic: interrupt-controller@2c010000 {
26 interrupt-controller;
Dfvp-foundation-gicv2-psci.dts14 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 gic: interrupt-controller@2f000000 {
94 interrupt-controller;
Da5ds.dts57 L2: cache-controller@1C010000 {
97 gic: interrupt-controller@1c001000 {
101 interrupt-controller;
Dcorstone700.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 gic: interrupt-controller@1c000000 {
38 interrupt-controller;
Dmorello-soc.dts465 its1: msi-controller@30040000 {
467 msi-controller;
472 its2: msi-controller@30060000 {
474 msi-controller;
479 its_ccix: msi-controller@30080000 {
481 msi-controller;
486 its_pcie: msi-controller@300a0000 {
488 msi-controller;
Dfvp-ve-Cortex-A5x1.dts7 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 gic: interrupt-controller@2c001000 {
74 interrupt-controller;
Dstm32mp15-bl32.dtsi24 /delete-node/ memory-controller@58002000;
Dn1sdp-multi-chip.dts103 msi-controller;
110 msi-controller;
Dstm32mp157c-ev1.dts28 nand-controller@4,0 {
Dstm32mp13-bl2.dtsi19 /delete-node/ memory-controller@58002000;
/trusted-firmware-a-latest/plat/renesas/common/
Drcar_common.c25 static int rcar_pcie_fixup(unsigned int controller) in rcar_pcie_fixup() argument
28 uint32_t addr = rcar_pcie_base[controller]; in rcar_pcie_fixup()
34 if (cpg & (MSTP318 << !controller)) in rcar_pcie_fixup()
/trusted-firmware-a-latest/docs/plat/
Dimx8.rst13 and 1 Cortex-M4 system controller.
16 controller.
20 controller is a Cortex-M4 that executes system controller firmware.
54 with certain offset for BOOT ROM. The system controller firmware,
Dnpcm845x.rst4 Nuvoton NPCM845X is the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC.
Drpi4.rst6 model has a GICv2 interrupt controller.
14 not seem to feature a secure memory controller of any kind, so portions of
62 This part knows how to access the MMC controller and how to parse a FAT
/trusted-firmware-a-latest/docs/components/
Dindex.rst17 platform-interrupt-controller-API
/trusted-firmware-a-latest/drivers/nxp/ddr/nxp-ddr/
DREADME.odt8 | Configuration | |DRAM controller| Slot 1 | Slo…

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