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Searched refs:cluster (Results 1 – 25 of 96) sorted by relevance

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/trusted-firmware-a-latest/plat/hisilicon/hikey960/drivers/pwrc/
Dhisi_pwrc.c40 #define CPUIDLE_FLAG_REG(cluster) \ argument
41 ((cluster == 0) ? REG_SCBAKDATA8_OFFSET : \
95 static void hisi_cpuhotplug_lock(unsigned int cluster, unsigned int core) in hisi_cpuhotplug_lock() argument
99 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_lock()
104 static void hisi_cpuhotplug_unlock(unsigned int cluster, unsigned int core) in hisi_cpuhotplug_unlock() argument
108 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_unlock()
114 void hisi_cpuidle_lock(unsigned int cluster, unsigned int core) in hisi_cpuidle_lock() argument
116 unsigned int offset = (cluster == 0 ? RES0_LOCK_BASE : RES1_LOCK_BASE); in hisi_cpuidle_lock()
122 void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core) in hisi_cpuidle_unlock() argument
124 unsigned int offset = (cluster == 0 ? RES0_LOCK_BASE : RES1_LOCK_BASE); in hisi_cpuidle_unlock()
[all …]
Dhisi_pwrc.h33 void hisi_cpuidle_lock(unsigned int cluster, unsigned int core);
34 void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core);
35 void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core);
36 void hisi_clear_cpuidle_flag(unsigned int cluster, unsigned int core);
37 void hisi_set_cpu_boot_flag(unsigned int cluster, unsigned int core);
38 void hisi_clear_cpu_boot_flag(unsigned int cluster, unsigned int core);
39 int cluster_is_powered_on(unsigned int cluster);
40 void hisi_enter_core_idle(unsigned int cluster, unsigned int core);
41 void hisi_enter_cluster_idle(unsigned int cluster, unsigned int core);
43 void hisi_enter_ap_suspend(unsigned int cluster, unsigned int core);
[all …]
/trusted-firmware-a-latest/plat/mediatek/mt8183/drivers/spmc/
Dmtspmc.c22 static void set_retention(int cluster, int tick) in set_retention() argument
26 if (cluster) in set_retention()
34 if (cluster) in set_retention()
40 void spm_enable_cpu_auto_off(int cluster, int cpu) in spm_enable_cpu_auto_off() argument
42 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_enable_cpu_auto_off()
44 set_retention(cluster, 1); in spm_enable_cpu_auto_off()
48 void spm_disable_cpu_auto_off(int cluster, int cpu) in spm_disable_cpu_auto_off() argument
50 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_disable_cpu_auto_off()
53 set_retention(cluster, 0); in spm_disable_cpu_auto_off()
56 void spm_set_cpu_power_off(int cluster, int cpu) in spm_set_cpu_power_off() argument
[all …]
Dmtspmc.h23 void spm_poweron_cpu(int cluster, int cpu);
24 void spm_poweroff_cpu(int cluster, int cpu);
26 void spm_poweroff_cluster(int cluster);
27 void spm_poweron_cluster(int cluster);
29 int spm_get_cpu_powerstate(int cluster, int cpu);
30 int spm_get_cluster_powerstate(int cluster);
33 void spm_enable_cpu_auto_off(int cluster, int cpu);
34 void spm_disable_cpu_auto_off(int cluster, int cpu);
35 void spm_set_cpu_power_off(int cluster, int cpu);
36 void spm_enable_cluster_auto_off(int cluster);
[all …]
/trusted-firmware-a-latest/plat/allwinner/common/
Dsunxi_cpu_ops.c28 static void sunxi_cpu_disable_power(unsigned int cluster, unsigned int core) in sunxi_cpu_disable_power() argument
30 if (mmio_read_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core)) == 0xff) in sunxi_cpu_disable_power()
33 VERBOSE("PSCI: Disabling power to cluster %d core %d\n", cluster, core); in sunxi_cpu_disable_power()
35 mmio_write_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core), 0xff); in sunxi_cpu_disable_power()
38 static void sunxi_cpu_enable_power(unsigned int cluster, unsigned int core) in sunxi_cpu_enable_power() argument
40 if (mmio_read_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core)) == 0) in sunxi_cpu_enable_power()
43 VERBOSE("PSCI: Enabling power to cluster %d core %d\n", cluster, core); in sunxi_cpu_enable_power()
46 mmio_write_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core), 0xfe); in sunxi_cpu_enable_power()
47 mmio_write_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core), 0xf8); in sunxi_cpu_enable_power()
48 mmio_write_32(SUNXI_CPU_POWER_CLAMP_REG(cluster, core), 0xe0); in sunxi_cpu_enable_power()
[all …]
/trusted-firmware-a-latest/plat/mediatek/mt8183/
Dplat_pm.c112 #define CPU_IDX(cluster, cpu) ((cluster << 2) + cpu) argument
136 static bool clst_single_pwr(int cluster, int cpu) in clst_single_pwr() argument
140 int my_idx = (cluster << 2) + cpu; in clst_single_pwr()
143 return !(pwr_stat & (cpu_mask[cluster] & ~BIT(cpu_pwr_bit[my_idx]))); in clst_single_pwr()
146 static bool clst_single_on(int cluster, int cpu) in clst_single_on() argument
149 int my_idx = (cluster << 2) + cpu; in clst_single_on()
152 return !(on_stat & (cpu_mask[cluster] & ~BIT(my_idx))); in clst_single_on()
170 static void plat_cluster_pwrdwn_common(uint64_t mpidr, int cluster) in plat_cluster_pwrdwn_common() argument
172 if (cluster > 0) in plat_cluster_pwrdwn_common()
180 static void plat_cluster_pwron_common(uint64_t mpidr, int cluster) in plat_cluster_pwron_common() argument
[all …]
/trusted-firmware-a-latest/plat/qti/msm8916/include/
Dmsm8916_mmap.h37 #define _APCS_CLUSTER(cluster) (APCS_BASE + ((cluster) * 0x100000)) argument
38 #define _APCS_CPU(cluster, cpu) (_APCS_CLUSTER(cluster) + ((cpu) * 0x10000)) argument
39 #define APCS_CFG(cluster) (_APCS_CLUSTER(cluster) + 0x10000) argument
40 #define APCS_GLB(cluster) (_APCS_CLUSTER(cluster) + 0x11000) argument
41 #define APCS_L2_SAW2(cluster) (_APCS_CLUSTER(cluster) + 0x12000) argument
42 #define APCS_QTMR(cluster) (_APCS_CLUSTER(cluster) + 0x20000) argument
43 #define APCS_ALIAS_ACS(cluster, cpu) (_APCS_CPU(cluster, cpu) + 0x88000) argument
44 #define APCS_ALIAS_SAW2(cluster, cpu) (_APCS_CPU(cluster, cpu) + 0x89000) argument
/trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/spmc/
Dmtspmc.h14 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu);
15 void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu);
17 void spm_poweroff_cluster(unsigned int cluster);
18 void spm_poweron_cluster(unsigned int cluster);
20 bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu);
21 bool spm_get_cluster_powerstate(unsigned int cluster);
24 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64);
25 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr);
26 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu);
28 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu);
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Dmtspmc.c18 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu) in mcucfg_disable_gic_wakeup() argument
23 void mcucfg_enable_gic_wakeup(unsigned int cluster, unsigned int cpu) in mcucfg_enable_gic_wakeup() argument
30 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr) in mcucfg_set_bootaddr() argument
32 assert(cluster == 0U); in mcucfg_set_bootaddr()
34 mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr); in mcucfg_set_bootaddr()
37 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu) in mcucfg_get_bootaddr() argument
39 assert(cluster == 0U); in mcucfg_get_bootaddr()
41 return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR)); in mcucfg_get_bootaddr()
44 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64) in mcucfg_init_archstate() argument
48 assert(cluster == 0U); in mcucfg_init_archstate()
[all …]
/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/spmc/
Dmtspmc.h14 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu);
15 void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu);
17 void spm_poweroff_cluster(unsigned int cluster);
18 void spm_poweron_cluster(unsigned int cluster);
20 bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu);
21 bool spm_get_cluster_powerstate(unsigned int cluster);
24 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64);
25 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr);
26 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu);
28 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu);
[all …]
Dmtspmc.c18 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu) in mcucfg_disable_gic_wakeup() argument
23 void mcucfg_enable_gic_wakeup(unsigned int cluster, unsigned int cpu) in mcucfg_enable_gic_wakeup() argument
28 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr) in mcucfg_set_bootaddr() argument
30 assert(cluster == 0U); in mcucfg_set_bootaddr()
32 mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr); in mcucfg_set_bootaddr()
35 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu) in mcucfg_get_bootaddr() argument
37 assert(cluster == 0U); in mcucfg_get_bootaddr()
39 return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR)); in mcucfg_get_bootaddr()
42 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64) in mcucfg_init_archstate() argument
46 assert(cluster == 0U); in mcucfg_init_archstate()
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/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhisi_ipc.c38 unsigned int cluster) in hisi_cpus_pd_in_cluster_besides_curr() argument
44 val = val >> (cluster * 16); in hisi_cpus_pd_in_cluster_besides_curr()
97 void hisi_ipc_cpu_on_off(unsigned int cpu, unsigned int cluster, in hisi_ipc_cpu_on_off() argument
104 offset = cluster * 16 + cpu * 4; in hisi_ipc_cpu_on_off()
106 offset = cluster * 16 + cpu * 4 + 1; in hisi_ipc_cpu_on_off()
116 hisi_ipc_send(cpu_ipc_num[cluster][cpu]); in hisi_ipc_cpu_on_off()
119 void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster) in hisi_ipc_cpu_on() argument
121 hisi_ipc_cpu_on_off(cpu, cluster, HISI_IPC_PM_ON); in hisi_ipc_cpu_on()
124 void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster) in hisi_ipc_cpu_off() argument
126 hisi_ipc_cpu_on_off(cpu, cluster, HISI_IPC_PM_OFF); in hisi_ipc_cpu_off()
[all …]
Dhikey_pm.c34 int cpu, cluster; in hikey_pwr_domain_on() local
37 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on()
40 if (cluster != curr_cluster) in hikey_pwr_domain_on()
41 hisi_ipc_cluster_on(cpu, cluster); in hikey_pwr_domain_on()
43 hisi_pwrc_set_core_bx_addr(cpu, cluster, hikey_sec_entrypoint); in hikey_pwr_domain_on()
44 hisi_pwrc_enable_debug(cpu, cluster); in hikey_pwr_domain_on()
45 hisi_ipc_cpu_on(cpu, cluster); in hikey_pwr_domain_on()
53 int cpu, cluster; in hikey_pwr_domain_on_finish() local
56 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on_finish()
68 hisi_pwrc_set_core_bx_addr(cpu, cluster, 0); in hikey_pwr_domain_on_finish()
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Dhisi_pwrc.c25 void hisi_pwrc_set_core_bx_addr(unsigned int core, unsigned int cluster, in hisi_pwrc_set_core_bx_addr() argument
36 i = cluster * CLUSTER_CORE_COUNT + core; in hisi_pwrc_set_core_bx_addr()
40 void hisi_pwrc_set_cluster_wfi(unsigned int cluster) in hisi_pwrc_set_cluster_wfi() argument
44 if (cluster == 0) { in hisi_pwrc_set_cluster_wfi()
48 } else if (cluster == 1) { in hisi_pwrc_set_cluster_wfi()
55 void hisi_pwrc_enable_debug(unsigned int core, unsigned int cluster) in hisi_pwrc_enable_debug() argument
59 enable = 1U << (core + PDBGUP_CLUSTER1_SHIFT * cluster); in hisi_pwrc_enable_debug()
/trusted-firmware-a-latest/plat/mediatek/mt8192/drivers/spmc/
Dmtspmc.h14 void spm_poweron_cpu(uint32_t cluster, uint32_t cpu);
15 void spm_poweroff_cpu(uint32_t cluster, uint32_t cpu);
17 void spm_poweroff_cluster(uint32_t cluster);
18 void spm_poweron_cluster(uint32_t cluster);
20 bool spm_get_cpu_powerstate(uint32_t cluster, uint32_t cpu);
21 bool spm_get_cluster_powerstate(uint32_t cluster);
24 void mcucfg_init_archstate(uint32_t cluster, uint32_t cpu, bool arm64);
25 void mcucfg_set_bootaddr(uint32_t cluster, uint32_t cpu, uintptr_t bootaddr);
26 uintptr_t mcucfg_get_bootaddr(uint32_t cluster, uint32_t cpu);
28 void mcucfg_disable_gic_wakeup(uint32_t cluster, uint32_t cpu);
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Dmtspmc.c18 void mcucfg_disable_gic_wakeup(uint32_t cluster, uint32_t cpu) in mcucfg_disable_gic_wakeup() argument
23 void mcucfg_enable_gic_wakeup(uint32_t cluster, uint32_t cpu) in mcucfg_enable_gic_wakeup() argument
28 void mcucfg_set_bootaddr(uint32_t cluster, uint32_t cpu, uintptr_t bootaddr) in mcucfg_set_bootaddr() argument
30 assert(cluster == 0U); in mcucfg_set_bootaddr()
32 mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr); in mcucfg_set_bootaddr()
35 uintptr_t mcucfg_get_bootaddr(uint32_t cluster, uint32_t cpu) in mcucfg_get_bootaddr() argument
37 assert(cluster == 0U); in mcucfg_get_bootaddr()
39 return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR)); in mcucfg_get_bootaddr()
42 void mcucfg_init_archstate(uint32_t cluster, uint32_t cpu, bool arm64) in mcucfg_init_archstate() argument
46 assert(cluster == 0U); in mcucfg_init_archstate()
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/trusted-firmware-a-latest/plat/hisilicon/hikey960/
Dhikey960_pm.c65 unsigned int cluster = in hikey960_pwr_domain_on() local
67 int cluster_stat = cluster_is_powered_on(cluster); in hikey960_pwr_domain_on()
69 hisi_set_cpu_boot_flag(cluster, core); in hikey960_pwr_domain_on()
71 mmio_write_32(CRG_REG_BASE + CRG_RVBAR(cluster, core), in hikey960_pwr_domain_on()
75 hisi_powerup_core(cluster, core); in hikey960_pwr_domain_on()
77 hisi_powerup_cluster(cluster, core); in hikey960_pwr_domain_on()
96 unsigned int cluster = in hikey960_pwr_domain_off() local
105 hisi_clear_cpu_boot_flag(cluster, core); in hikey960_pwr_domain_off()
106 hisi_powerdn_core(cluster, core); in hikey960_pwr_domain_off()
109 if (hisi_test_cpu_down(cluster, core)) { in hikey960_pwr_domain_off()
[all …]
/trusted-firmware-a-latest/plat/mediatek/mt8183/drivers/mcdi/
Dmtk_mcdi.h14 void sspm_cluster_pwr_off_notify(uint32_t cluster);
15 void sspm_cluster_pwr_on_notify(uint32_t cluster);
25 void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26 void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27 void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28 void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29 void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
Dmtk_mcdi.c28 void sspm_cluster_pwr_off_notify(uint32_t cluster) in sspm_cluster_pwr_off_notify() argument
30 mcdi_mbox_write(MCDI_MBOX_CLUSTER_0_ATF_ACTION_DONE + cluster, 1); in sspm_cluster_pwr_off_notify()
33 void sspm_cluster_pwr_on_notify(uint32_t cluster) in sspm_cluster_pwr_on_notify() argument
35 mcdi_mbox_write(MCDI_MBOX_CLUSTER_0_ATF_ACTION_DONE + cluster, 0); in sspm_cluster_pwr_on_notify()
88 static uint32_t target_mask(int cluster, int cpu_idx, bool on) in target_mask() argument
93 if (cluster >= 0) in target_mask()
94 t |= BIT(cluster + CLUSTER_ON_OFS); in target_mask()
99 if (cluster >= 0) in target_mask()
100 t |= BIT(cluster + CLUSTER_OFF_OFS); in target_mask()
109 void mcdi_pause_clr(int cluster, int cpu_idx, bool on) in mcdi_pause_clr() argument
[all …]
/trusted-firmware-a-latest/drivers/marvell/
Dap807_clocks_init.c15 #define AP807_CPU_ARO_CTRL(cluster) \ argument
16 (MVEBU_RFU_BASE + 0x82A8 + (0xA58 * (cluster)))
36 #define AP807_CPU_PLL_CTRL(cluster) \ argument
37 (MVEBU_RFU_BASE + 0x82E0 + (0x8 * (cluster)))
39 #define AP807_CPU_PLL_PARAM(cluster) AP807_CPU_PLL_CTRL(cluster) argument
40 #define AP807_CPU_PLL_CFG(cluster) (AP807_CPU_PLL_CTRL(cluster) + 0x4) argument
/trusted-firmware-a-latest/plat/hisilicon/hikey/include/
Dhisi_ipc.h37 void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster);
38 void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster);
39 void hisi_ipc_cpu_suspend(unsigned int cpu, unsigned int cluster);
40 void hisi_ipc_cluster_on(unsigned int cpu, unsigned int cluster);
41 void hisi_ipc_cluster_off(unsigned int cpu, unsigned int cluster);
42 void hisi_ipc_cluster_suspend(unsigned int cpu, unsigned int cluster);
/trusted-firmware-a-latest/plat/qti/msm8916/
Dmsm8916_config.c52 static void msm8916_configure_apcs_cluster(unsigned int cluster) in msm8916_configure_apcs_cluster() argument
54 uintptr_t cfg = APCS_CFG(cluster); in msm8916_configure_apcs_cluster()
66 mmio_write_32(APCS_GLB(cluster), in msm8916_configure_apcs_cluster()
71 mmio_write_32(APCS_L2_SAW2(cluster), 0); in msm8916_configure_apcs_cluster()
75 mmio_write_32(APCS_ALIAS_ACS(cluster, cpu), 0); in msm8916_configure_apcs_cluster()
76 mmio_write_32(APCS_ALIAS_SAW2(cluster, cpu), 0); in msm8916_configure_apcs_cluster()
95 msm8916_configure_timer(APCS_QTMR(cluster)); in msm8916_configure_apcs_cluster()
100 unsigned int cluster; in msm8916_configure_apcs() local
102 for (cluster = 0; cluster < PLATFORM_CLUSTER_COUNT; cluster++) { in msm8916_configure_apcs()
103 msm8916_configure_apcs_cluster(cluster); in msm8916_configure_apcs()
/trusted-firmware-a-latest/plat/ti/k3/common/
Dk3_topology.c28 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr() local
36 if (cluster > 0) in plat_core_pos_by_mpidr()
38 if (cluster > 1) in plat_core_pos_by_mpidr()
40 if (cluster > 2) in plat_core_pos_by_mpidr()
42 if (cluster > 3) in plat_core_pos_by_mpidr()
/trusted-firmware-a-latest/plat/hisilicon/hikey960/include/
Dhisi_ipc.h15 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster,
17 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster,
19 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster);
20 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster,
/trusted-firmware-a-latest/plat/hisilicon/hikey960/drivers/ipc/
Dhisi_ipc.c133 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster, in hisi_ipc_pm_on_off() argument
141 cmdtype = IPC_CMD_TYPE(0, cluster, mode, 0x3); in hisi_ipc_pm_on_off()
143 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_pm_on_off()
147 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster, in hisi_ipc_pm_suspend() argument
158 cmdtype = IPC_CMD_TYPE(0, cluster, 0x1, 0x3 + affinity_level); in hisi_ipc_pm_suspend()
161 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_pm_suspend()
165 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster) in hisi_ipc_psci_system_off() argument
174 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_psci_system_off()
178 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster, in hisi_ipc_psci_system_reset() argument
188 source = cluster ? SRC_A7 : SRC_A15; in hisi_ipc_psci_system_reset()

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