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/trusted-firmware-a-latest/plat/intel/soc/agilex5/
Dbl31_plat_setup.c193 uint32_t boot_core = 0x00; in bl31_plat_arch_setup() local
197 boot_core = (mmio_read_32(AGX5_PWRMGR(MPU_BOOTCONFIG)) & 0xC00); in bl31_plat_arch_setup()
198 NOTICE("BL31: Boot Core = %x\n", boot_core); in bl31_plat_arch_setup()
237 uint32_t boot_core = 0x00; in bl31_plat_set_secondary_cpu_entrypoint() local
239 boot_core = (mmio_read_32(AGX5_PWRMGR(MPU_BOOTCONFIG)) & 0xC00); in bl31_plat_set_secondary_cpu_entrypoint()
243 if (boot_core == 0x00) { in bl31_plat_set_secondary_cpu_entrypoint()