Searched refs:bl2_tzram_layout (Results 1 – 9 of 9) sorted by relevance
| /trusted-firmware-a-latest/plat/hisilicon/poplar/ |
| D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable
56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load()
57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load()
59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load()
61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load()
64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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| D | bl2_plat_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
186 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2()
200 plat_configure_mmu_el1(bl2_tzram_layout.total_base, in bl2_plat_arch_setup()
201 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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| /trusted-firmware-a-latest/plat/marvell/armada/common/ |
| D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout()
52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup()
79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup()
80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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| /trusted-firmware-a-latest/plat/rpi/rpi3/ |
| D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
65 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2()
86 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup()
87 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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| /trusted-firmware-a-latest/plat/arm/common/ |
| D | arm_bl2_setup.c | 33 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
52 bl2_tzram_layout.total_base, \
53 bl2_tzram_layout.total_size, \
57 bl2_tzram_layout.total_base, \
58 bl2_tzram_layout.total_size, \
78 bl2_tzram_layout = *mem_layout; in arm_bl2_early_platform_setup()
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| /trusted-firmware-a-latest/plat/brcm/common/ |
| D | brcm_bl2_setup.c | 22 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
54 bl2_tzram_layout = *mem_layout; in bcm_bl2_early_platform_setup()
102 MAP_REGION_FLAT(bl2_tzram_layout.total_base, in bcm_bl2_plat_arch_setup()
103 bl2_tzram_layout.total_size, in bcm_bl2_plat_arch_setup()
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| /trusted-firmware-a-latest/plat/qemu/common/ |
| D | qemu_bl2_setup.c | 30 bl2_tzram_layout.total_base, \
31 bl2_tzram_layout.total_size, \
53 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
67 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2()
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| /trusted-firmware-a-latest/plat/renesas/rzg/ |
| D | bl2_plat_setup.c | 108 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
423 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout()
867 bl2_tzram_layout.total_base = BL31_BASE; in bl2_el3_early_platform_setup()
868 bl2_tzram_layout.total_size = BL31_LIMIT - BL31_BASE; in bl2_el3_early_platform_setup()
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| /trusted-firmware-a-latest/plat/renesas/rcar/ |
| D | bl2_plat_setup.c | 117 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
525 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout()
1074 bl2_tzram_layout.total_base = BL31_BASE; in bl2_el3_early_platform_setup()
1075 bl2_tzram_layout.total_size = BL31_LIMIT - BL31_BASE; in bl2_el3_early_platform_setup()
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