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Searched refs:arg2 (Results 1 – 25 of 155) sorted by relevance

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/trusted-firmware-a-latest/bl32/tsp/
Dtsp_private.h53 uint64_t arg2,
61 uint64_t arg2,
69 uint64_t arg2,
78 uint64_t arg2,
108 uint64_t arg2,
117 uint64_t arg2,
126 uint64_t arg2,
135 uint64_t arg2,
Dtsp_common.c36 uint64_t arg2, in set_smc_args() argument
54 write_sp_arg(pcpu_smc_args, SMC_ARG2, arg2); in set_smc_args()
90 uint64_t arg2, in tsp_system_off_main() argument
118 uint64_t arg2, in tsp_system_reset_main() argument
148 uint64_t arg2, in tsp_abort_smc_handler() argument
Dtsp_ffa_main.c84 uint64_t arg2, in ffa_test_relay() argument
281 uint64_t arg2, in tsp_cpu_off_main() argument
319 uint64_t arg2, in tsp_cpu_suspend_main() argument
356 uint64_t arg2, in tsp_cpu_resume_main() argument
389 uint64_t arg2, in handle_framework_message() argument
402 if ((arg2 & FFA_FWK_MSG_MASK) == FFA_FWK_MSG_PSCI) { in handle_framework_message()
405 return tsp_cpu_off_main(arg0, arg1, arg2, arg3, in handle_framework_message()
408 return tsp_cpu_suspend_main(arg0, arg1, arg2, arg3, in handle_framework_message()
411 } else if ((arg2 & FFA_FWK_MSG_MASK) == FFA_PM_MSG_WB_REQ) { in handle_framework_message()
414 return tsp_cpu_resume_main(arg0, arg1, arg2, arg3, in handle_framework_message()
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Dtsp_main.c91 uint64_t arg2, in tsp_cpu_off_main() argument
130 uint64_t arg2, in tsp_cpu_suspend_main() argument
168 uint64_t arg2, in tsp_cpu_resume_main() argument
204 uint64_t arg2, in tsp_smc_handler() argument
231 results[1] = arg2; in tsp_smc_handler()
/trusted-firmware-a-latest/plat/xilinx/common/include/
Dpm_api_sys.h57 uint32_t arg1, uint32_t arg2, uint32_t arg3,
59 enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
83 #define PM_PACK_PAYLOAD3(pl, mid, flag, arg0, arg1, arg2) { \ argument
84 pl[2] = (uint32_t)(arg2); \
88 #define PM_PACK_PAYLOAD4(pl, mid, flag, arg0, arg1, arg2, arg3) { \ argument
90 PM_PACK_PAYLOAD3(pl, (mid), (flag), (arg0), (arg1), (arg2)); \
93 #define PM_PACK_PAYLOAD5(pl, mid, flag, arg0, arg1, arg2, arg3, arg4) { \ argument
95 PM_PACK_PAYLOAD4(pl, (mid), (flag), (arg0), (arg1), (arg2), (arg3)); \
98 #define PM_PACK_PAYLOAD6(pl, mid, flag, arg0, arg1, arg2, arg3, arg4, arg5) { \ argument
100 PM_PACK_PAYLOAD5(pl, (mid), (flag), (arg0), (arg1), (arg2), (arg3), (arg4)); \
/trusted-firmware-a-latest/lib/debugfs/
Ddebugfs_smc.c64 u_register_t arg2, in debugfs_smc_handler() argument
87 arg2 &= 0xffffffff; in debugfs_smc_handler()
105 ret = mmap_add_dynamic_region(arg2, in debugfs_smc_handler()
133 ret = open(parms.open.fname, arg2); in debugfs_smc_handler()
141 ret = close(arg2); in debugfs_smc_handler()
149 ret = read(arg2, DEBUGFS_SHARED_BUF_VIRT, arg3); in debugfs_smc_handler()
157 ret = seek(arg2, arg3, arg4); in debugfs_smc_handler()
/trusted-firmware-a-latest/plat/mediatek/drivers/dfd/
Ddfd.c14 u_register_t arg2, u_register_t arg3, in dfd_smc_dispatcher() argument
22 dfd_setup(arg1, arg2, arg3); in dfd_smc_dispatcher()
33 sync_writel(MISC1_CFG_BASE + arg1, arg2); in dfd_smc_dispatcher()
/trusted-firmware-a-latest/bl2/
Dbl2_main.c41 void bl2_el3_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2, in bl2_el3_setup() argument
45 bl2_el3_early_platform_setup(arg0, arg1, arg2, arg3); in bl2_el3_setup()
63 void bl2_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2, in bl2_setup() argument
67 bl2_early_platform_setup2(arg0, arg1, arg2, arg3); in bl2_setup()
/trusted-firmware-a-latest/plat/xilinx/zynqmp/pm_service/
Dzynqmp_pm_api_sys.h50 #define PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2) { \ argument
51 pl[2] = (uint32_t)(arg2); \
55 #define PM_PACK_PAYLOAD4(pl, arg0, arg1, arg2, arg3) { \ argument
57 PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2); \
60 #define PM_PACK_PAYLOAD5(pl, arg0, arg1, arg2, arg3, arg4) { \ argument
62 PM_PACK_PAYLOAD4(pl, arg0, arg1, arg2, arg3); \
65 #define PM_PACK_PAYLOAD6(pl, arg0, arg1, arg2, arg3, arg4, arg5) { \ argument
67 PM_PACK_PAYLOAD5(pl, arg0, arg1, arg2, arg3, arg4); \
136 uint32_t arg2,
150 void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2,
Dpm_api_ioctl.c604 uint32_t arg2, in pm_api_ioctl() argument
624 ret = pm_ioctl_set_tapdelay_bypass(arg1, arg2); in pm_api_ioctl()
630 ret = pm_ioctl_sd_set_tapdelay(nid, arg1, arg2); in pm_api_ioctl()
633 ret = pm_ioctl_set_pll_frac_mode(arg1, arg2); in pm_api_ioctl()
639 ret = pm_ioctl_set_pll_frac_data(arg1, arg2); in pm_api_ioctl()
645 ret = pm_ioctl_write_ggs(arg1, arg2); in pm_api_ioctl()
651 ret = pm_ioctl_write_pggs(arg1, arg2); in pm_api_ioctl()
663 ret = pm_ioctl_afi(arg1, arg2); in pm_api_ioctl()
667 PM_PACK_PAYLOAD5(payload, PM_IOCTL, nid, ioctl_id, arg1, arg2); in pm_api_ioctl()
/trusted-firmware-a-latest/plat/arm/board/fvp_ve/sp_min/
Dfvp_ve_sp_min_setup.c12 u_register_t arg2, u_register_t arg3) in plat_arm_sp_min_early_platform_setup() argument
14 arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in plat_arm_sp_min_early_platform_setup()
/trusted-firmware-a-latest/plat/arm/board/corstone700/sp_min/
Dcorstone700_sp_min_setup.c10 u_register_t arg2, u_register_t arg3) in plat_arm_sp_min_early_platform_setup() argument
12 arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in plat_arm_sp_min_early_platform_setup()
/trusted-firmware-a-latest/plat/arm/board/a5ds/sp_min/
Da5ds_sp_min_setup.c12 u_register_t arg2, u_register_t arg3) in plat_arm_sp_min_early_platform_setup() argument
14 arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in plat_arm_sp_min_early_platform_setup()
/trusted-firmware-a-latest/plat/arm/common/sp_min/
Darm_sp_min_setup.c98 bl33_image_ep_info.args.arg2 = (u_register_t)ARM_PRELOADED_DTB_BASE; in arm_sp_min_early_platform_setup()
137 u_register_t arg2, u_register_t arg3) in plat_arm_sp_min_early_platform_setup() argument
139 arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in plat_arm_sp_min_early_platform_setup()
159 u_register_t arg2, u_register_t arg3) in sp_min_early_platform_setup2() argument
161 plat_arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3); in sp_min_early_platform_setup2()
/trusted-firmware-a-latest/include/bl2/
Dbl2.h12 void bl2_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
14 void bl2_el3_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
/trusted-firmware-a-latest/plat/st/stm32mp1/sp_min/
Dsp_min_setup.c114 u_register_t arg2, u_register_t arg3) in sp_min_early_platform_setup2() argument
147 if (arg2 != 0U) { in sp_min_early_platform_setup2()
150 bl33_image_ep_info.args.arg2 = arg2; in sp_min_early_platform_setup2()
/trusted-firmware-a-latest/include/services/
Del3_spmd_logical_sp.h32 uint64_t arg2; member
110 return (uint16_t)(args->arg2 & 0xFFFFU); in ffa_partition_info_regs_get_last_idx()
116 return (uint16_t)((args->arg2 >> 16) & 0xFFFFU); in ffa_partition_info_regs_get_curr_idx()
121 return (uint16_t)((args->arg2 >> 32) & 0xFFFFU); in ffa_partition_info_regs_get_tag()
127 return (uint16_t)(args->arg2 >> 48); in ffa_partition_info_regs_get_desc_size()
/trusted-firmware-a-latest/plat/arm/board/juno/
Djuno_bl31_setup.c16 u_register_t arg1, u_register_t arg2, u_register_t arg3) in bl31_early_platform_setup2() argument
30 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in bl31_early_platform_setup2()
/trusted-firmware-a-latest/drivers/arm/css/scmi/
Dscmi_private.h100 #define SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2) do { \ argument
102 mmio_write_32((uintptr_t)&payld_arr[1], arg2); \
105 #define SCMI_PAYLOAD_ARG3(payld_arr, arg1, arg2, arg3) do { \ argument
106 SCMI_PAYLOAD_ARG2(payld_arr, arg1, arg2); \
/trusted-firmware-a-latest/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c90 bl_mem_params->ep_info.args.arg2 = in bl2_plat_handle_post_image_load()
93 bl_mem_params->ep_info.args.arg2 = 0; in bl2_plat_handle_post_image_load()
150 void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, in bl2_el3_early_platform_setup() argument
166 imx7_platform_setup(arg1, arg2, arg3, arg4); in bl2_el3_early_platform_setup()
/trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/dfd/
Dplat_dfd.c71 uint64_t arg2, uint64_t arg3) in dfd_smc_dispatcher() argument
78 dfd_setup(arg1, arg2, arg3); in dfd_smc_dispatcher()
89 sync_writel(MISC1_CFG_BASE + arg1, arg2); in dfd_smc_dispatcher()
/trusted-firmware-a-latest/plat/mediatek/mt8192/drivers/dfd/
Dplat_dfd.c113 uint64_t arg2, uint64_t arg3) in dfd_smc_dispatcher() argument
119 dfd_setup(arg1, arg2, arg3); in dfd_smc_dispatcher()
130 sync_writel(MISC1_CFG_BASE + arg1, arg2); in dfd_smc_dispatcher()
/trusted-firmware-a-latest/plat/arm/board/fvp/
Dfvp_bl31_setup.c23 u_register_t arg1, u_register_t arg2, u_register_t arg3) in bl31_early_platform_setup2() argument
49 arg2 = hw_config_info->secondary_config_addr; in bl31_early_platform_setup2()
52 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); in bl31_early_platform_setup2()
/trusted-firmware-a-latest/services/std_svc/rmmd/trp/
Dtrp_helpers.c23 uint64_t arg2, in set_smc_args() argument
41 write_trp_arg(pcpu_smc_args, TRP_ARG2, arg2); in set_smc_args()
/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/dfd/
Dplat_dfd.c129 uint64_t arg2, uint64_t arg3) in dfd_smc_dispatcher() argument
136 dfd_setup(arg1, arg2, arg3); in dfd_smc_dispatcher()
147 sync_writel(MISC1_CFG_BASE + arg1, arg2); in dfd_smc_dispatcher()

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