| /trusted-firmware-a-latest/services/std_svc/spm/spm_mm/ |
| D | spm_mm_xlat.c | 35 unsigned int access = (attributes & MM_SP_MEMORY_ATTRIBUTES_ACCESS_MASK) in smc_attr_to_mmap_attr() local
38 if (access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_RW) { in smc_attr_to_mmap_attr()
40 } else if (access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_RO) { in smc_attr_to_mmap_attr()
44 assert(access == MM_SP_MEMORY_ATTRIBUTES_ACCESS_NOACCESS); in smc_attr_to_mmap_attr()
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| /trusted-firmware-a-latest/include/lib/extensions/ |
| D | ras.h | 45 .access = ERR_ACCESS_SYSREG, \
54 .access = ERR_ACCESS_MEMMAP, \
157 unsigned int access:1; member
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| /trusted-firmware-a-latest/docs/design/ |
| D | alt-boot-flows.rst | 8 the highest exception level is required. It allows full, direct access to the
27 configured to permit secure access only. This gives full access to the whole
35 - Little-endian data access;
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| /trusted-firmware-a-latest/tools/fiptool/ |
| D | win_posix.h | 126 inline int access(const char *path, int mode) in access() function
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| D | fiptool.c | 881 if (access(argv[0], F_OK) == 0) in update_cmd()
1022 if (access(file, F_OK) != 0 || fflag) { in unpack_cmd()
1136 if (outfile[0] != '\0' && access(outfile, F_OK) == 0 && !fflag) in remove_cmd()
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| /trusted-firmware-a-latest/docs/components/ |
| D | secure-partition-manager-mm.rst | 19 used by Non-secure world applications to access these services. A Trusted OS
46 privileged firmware (i.e. TF-A) to be granted access to system and processor
235 - Interfaces that enable access to privileged operations from S-EL0. These
236 operations typically require access to system resources that are either shared
255 Hence, the SVC conduit must be used by the Secure Partition to access interfaces
402 that it needs access to and their attributes. The SPM validates this resource
406 instruction access permissions.
408 2. Code memory regions are mapped with RO data and Executable instruction access
412 instruction access permissions.
415 instruction access permissions.
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| D | granule-protection-tables-design.rst | 13 spaces have been added to control memory access for each state. The PAS access
16 .. list-table:: Security states and PAS access rights
48 level 0 table controls access to a relatively large region in memory (block
103 structures, then the library will check the desired memory access layout for
152 ``pas_region_t`` structures containing the desired memory access layout. The
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| D | debugfs-design.rst | 73 - This permits direct access to a firmware driver, mainly for test purposes
103 - On concurrent access, a spinlock is implemented in the BL31 service to protect
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| D | ffa-manifest-binding.rst | 302 - exclusive-access
305 access and ownership of this device's MMIO region.
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| D | realm-management-extension.rst | 247 -C cluster0.gicv3.cpuintf-mmap-access-level=2 \
265 -C cluster1.gicv3.cpuintf-mmap-access-level=2 \
323 > Test suite 'Invalid memory access'
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| /trusted-firmware-a-latest/docs/threat_model/ |
| D | threat_model_rss_interface.rst | 47 - ID 11: The access to the communication interface between AP and RSS is
50 gain access to sensitive data.
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| D | threat_model.rst | 74 | DF3 | | Debug and trace IP on a platform can allow access |
149 | AppDebug | | Physical attacker using debug signals to access |
152 | PhysicalAccess | | Physical attacker having access to external device |
260 that require physical access are unlikely in server environments while
458 | | access memory beyond its limit. |
487 | | access sensitive data, execute arbitrary |
488 | | code or access otherwise restricted HW |
493 | | normal world to access sensitive data or even |
516 | Mitigations | When configuring access permissions, the |
546 | | gains access to memory due to a vulnerability. |
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| D | threat_model_fvp_r.rst | 71 - ID 04: An attacker with physical access can execute arbitrary image by
86 normal world software to access sensitive data or execute arbitrary code.
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| D | threat_model_el3_spm.rst | 66 | DF7 | External memory access. |
113 - Hardware attacks (non-invasive) requiring a physical access to the device,
335 | | getting access or gaining permissions to a memory |
535 | | access this service.** |
600 | | be able to relinquish the access to shared memory |
638 | Mitigations | Yes. The SPMC tracks ownership and access state |
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| D | threat_model_arm_cca.rst | 154 | | | software to access sensitive data, execute arbitrary|
155 | | | code or access otherwise restricted HW interface. |
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| /trusted-firmware-a-latest/docs/plat/arm/tc/ |
| D | index.rst | 9 loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access
29 FIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2
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| /trusted-firmware-a-latest/plat/nvidia/tegra/include/t186/ |
| D | tegra_mc_def.h | 334 #define mc_make_sec_cfg(off, ns, ovrrd, access) \ argument
341 .override_enable = OVERRIDE_ ## access \
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| /trusted-firmware-a-latest/docs/plat/marvell/armada/misc/ |
| D | mvebu-io-win.rst | 14 - **0x2** = SPI direct access
|
| /trusted-firmware-a-latest/docs/security_advisories/ |
| D | security-advisory-tfv-3.rst | 29 contains flags to control data access permissions (``MT_RO``/``MT_RW``) and
47 permissions separately to data access permissions. All RO normal memory regions
|
| D | security-advisory-tfv-11.rst | 51 register. Which may cause a data abort or an access to a random EL3 memory region.
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| /trusted-firmware-a-latest/docs/plat/arm/ |
| D | arm-build-options.rst | 13 - ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase<N>``
17 kernel). Default is true (access to the frame is allowed).
40 MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
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| /trusted-firmware-a-latest/docs/design_documents/ |
| D | rss.rst | 55 - ``Pointer-access messaging``: The message header and the payload are
64 ``iovec``. Therefore, the sender must handle both cases and prevent access to
81 V | |access | |
181 | Register access | IRQ
194 | IRQ | Register access
430 it on behalf of RMM. The access to MHU interface and thereby to RSS is
431 restricted to BL31 only. Therefore, RMM does not have direct access, all calls
629 RSS provides access for AP to assets in OTP, which include keys for image
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| /trusted-firmware-a-latest/docs/plat/ |
| D | rz-g2.rst | 82 behind using direct shared memory access to BOOT_KIND_BASE _and_
162 - Boot the board in Mini-monitor mode and enable access to the
|
| D | rcar-gen3.rst | 87 behind using direct shared memory access to BOOT_KIND_BASE _and_
189 - Boot the board in Mini-monitor mode and enable access to the
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| /trusted-firmware-a-latest/docs/getting_started/ |
| D | build-options.rst | 278 extension. It allows access to the SCXTNUM_EL2 (Software Context Number)
291 Virtualization feature, allowing for access to the CNTPOFF_EL2 (Counter-timer
298 feature allowing for access to the HDFGRTR_EL2 (Hypervisor Debug Fine-Grained
305 allow access to HCRX_EL2 (extended hypervisor control register) from EL2 as
312 ``FEAT_MTE_PERM``, which introduces Allocation tag access permission to
320 permission fault for any privileged data access from EL1/EL2 to virtual
357 Host Extensions) extension. It allows access to CONTEXTIDR_EL2 register
364 allow access to TCR2_EL2 (extended translation control) from EL2 as
408 access their own MPAM registers without trapping into EL3. This option
453 for AArch64. Note that when SVE is enabled for the Non-secure world, access
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