| /trusted-firmware-a-latest/plat/rockchip/rk3368/ |
| D | rk3368_def.h | 38 #define UART0_BASE 0xff180000 macro
|
| /trusted-firmware-a-latest/plat/mediatek/mt8195/ |
| D | bl31_plat_setup.c | 75 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/mediatek/mt8186/ |
| D | bl31_plat_setup.c | 75 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/mediatek/mt8192/ |
| D | bl31_plat_setup.c | 76 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/rockchip/rk3288/ |
| D | rk3288_def.h | 31 #define UART0_BASE 0xff180000 macro
|
| /trusted-firmware-a-latest/plat/qemu/qemu/include/ |
| D | platform_def.h | 210 #define UART0_BASE 0x09000000 macro
215 #define PLAT_QEMU_BOOT_UART_BASE UART0_BASE
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| /trusted-firmware-a-latest/plat/qemu/qemu_sbsa/include/ |
| D | platform_def.h | 180 #define UART0_BASE 0x60000000 macro
189 #define PLAT_QEMU_BOOT_UART_BASE UART0_BASE
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| /trusted-firmware-a-latest/plat/mediatek/mt8192/include/ |
| D | platform_def.h | 66 #define UART0_BASE (IO_PHYS + 0x01002000) macro
|
| /trusted-firmware-a-latest/plat/mediatek/mt8186/include/ |
| D | platform_def.h | 59 #define UART0_BASE (IO_PHYS + 0x01002000) macro
|
| /trusted-firmware-a-latest/plat/rockchip/rk3328/ |
| D | rk3328_def.h | 18 #define UART0_BASE 0xff110000 macro
|
| /trusted-firmware-a-latest/plat/mediatek/mt8195/include/ |
| D | platform_def.h | 70 #define UART0_BASE (IO_PHYS + 0x01001100) macro
|
| /trusted-firmware-a-latest/plat/mediatek/mt8183/ |
| D | bl31_plat_setup.c | 127 console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/rockchip/px30/ |
| D | px30_def.h | 31 #define UART0_BASE 0xff030000 macro
|
| /trusted-firmware-a-latest/plat/rockchip/rk3399/include/shared/ |
| D | addressmap_shared.h | 21 #define UART0_BASE (MMIO_BASE + 0x07180000) macro
|
| /trusted-firmware-a-latest/plat/mediatek/mt8188/include/ |
| D | platform_def.h | 77 #define UART0_BASE (IO_PHYS + 0x01002000) macro
|
| /trusted-firmware-a-latest/plat/rockchip/common/ |
| D | params_setup.c | 83 uart_base = UART0_BASE; in plat_rockchip_dt_process_fdt_uart()
|
| /trusted-firmware-a-latest/plat/rockchip/rk3328/drivers/soc/ |
| D | soc.c | 22 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
|
| /trusted-firmware-a-latest/plat/mediatek/drivers/uart/ |
| D | uart.c | 13 UART0_BASE,
|
| /trusted-firmware-a-latest/plat/rockchip/rk3288/drivers/soc/ |
| D | soc.c | 37 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
|
| /trusted-firmware-a-latest/plat/mediatek/mt8183/include/ |
| D | platform_def.h | 99 #define UART0_BASE (IO_PHYS + 0x01002000) macro
|
| /trusted-firmware-a-latest/plat/rockchip/rk3368/drivers/soc/ |
| D | soc.c | 33 MAP_REGION_FLAT(UART0_BASE, UART0_SIZE,
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